Lin Chen

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Shuffler circuit for lane shuffle in SIMD architecture
- Patent number 10,592,468
- Issue date Mar 17, 2020
- QUALCOMM Incorporated
- Liang Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
General purpose register allocation in streaming processor
- Patent number 10,558,460
- Issue date Feb 11, 2020
- QUALCOMM Incorporated
- Yun Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic shader instruction nullification for graphics processing
- Patent number 10,430,912
- Issue date Oct 1, 2019
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for serialized execution in a SIMD processing system
- Patent number 10,133,572
- Issue date Nov 20, 2018
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Constant multiplication with texture unit of graphics processing unit
- Patent number 10,089,708
- Issue date Oct 2, 2018
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Per-instance preamble for graphics processing
- Patent number 9,799,094
- Issue date Oct 24, 2017
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Per-shader preamble for graphics processing
- Patent number 9,799,089
- Issue date Oct 24, 2017
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Utilizing pipeline registers as intermediate storage
- Patent number 9,747,104
- Issue date Aug 29, 2017
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Skipping of data storage
- Patent number 9,665,370
- Issue date May 30, 2017
- QUALCOMM Incorporated
- Yun Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
GPU divergence barrier
- Patent number 9,652,284
- Issue date May 16, 2017
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulation of fused multiply-add operations
- Patent number 9,645,792
- Issue date May 9, 2017
- QUALCOMM Incorporated
- Pramod Vasant Argade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load scheme for shared register in GPU
- Patent number 9,633,411
- Issue date Apr 25, 2017
- QUALCOMM Incorporated
- Yun Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Padding for multi-channel memory
- Patent number 9,299,124
- Issue date Mar 29, 2016
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectively activating a resume check operation in a multi-threaded...
- Patent number 9,256,429
- Issue date Feb 9, 2016
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing subroutines in a multi-threaded processing system
- Patent number 9,229,721
- Issue date Jan 5, 2016
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for performing user-defined clipping in object space
- Patent number 9,024,969
- Issue date May 5, 2015
- QUALCOMM Incorporated
- Ning Bi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory channel selection in a multi-channel memory
- Patent number 9,009,441
- Issue date Apr 14, 2015
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program flow control for multiple divergent SIMD threads using a mi...
- Patent number 8,832,417
- Issue date Sep 9, 2014
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data access tool for programmable graphics hardware
- Patent number 8,760,457
- Issue date Jun 24, 2014
- QUALCOMM Incorporated
- Alexei V. Bourd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shader compile system and method
- Patent number 8,495,602
- Issue date Jul 23, 2013
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of mapping shader variables into physical registers
- Patent number 8,379,032
- Issue date Feb 19, 2013
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for performing user-defined clipping in object space
- Patent number 8,237,739
- Issue date Aug 7, 2012
- QUALCOMM Incorporated
- Ning Bi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for instruction latency reduction in graphics pro...
- Patent number 8,098,251
- Issue date Jan 17, 2012
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC SHADER INSTRUCTION NULLIFICATION FOR GRAPHICS PROCESSING
- Publication number 20180232846
- Publication date Aug 16, 2018
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERAL PURPOSE REGISTER ALLOCATION IN STREAMING PROCESSOR
- Publication number 20180165092
- Publication date Jun 14, 2018
- QUALCOMM Incorporated
- Yun Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHUFFLER CIRCUIT FOR LANE SHUFFLE IN SIMD ARCHITECTURE
- Publication number 20180018299
- Publication date Jan 18, 2018
- QUALCOMM Incorporated
- Liang Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONSTANT MULTIPLICATION WITH TEXTURE UNIT OF GRAPHICS PROCESSING UNIT
- Publication number 20170316540
- Publication date Nov 2, 2017
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SKIPPING OF DATA STORAGE
- Publication number 20160054998
- Publication date Feb 25, 2016
- QUALCOMM Incorporated
- Yun Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EMULATION OF FUSED MULTIPLY-ADD OPERATIONS
- Publication number 20160048374
- Publication date Feb 18, 2016
- QUALCOMM Incorporated
- Pramod Vasant Argade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR SCALING INSTRUCTIONS FOR USE IN AN ARITHMETIC LOGIC UNIT
- Publication number 20160019027
- Publication date Jan 21, 2016
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD SCHEME FOR SHARED REGISTER IN GPU
- Publication number 20150379680
- Publication date Dec 31, 2015
- QUALCOMM Incorporated
- Yun Du
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UTILIZING PIPELINE REGISTERS AS INTERMEDIATE STORAGE
- Publication number 20150324196
- Publication date Nov 12, 2015
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR SERIALIZED EXECUTION IN A SIMD PROCESSING SYSTEM
- Publication number 20150317157
- Publication date Nov 5, 2015
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GPU DIVERGENCE BARRIER
- Publication number 20150095914
- Publication date Apr 2, 2015
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTING SUBROUTINES IN A MULTI-THREADED PROCESSING SYSTEM
- Publication number 20140075165
- Publication date Mar 13, 2014
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVELY ACTIVATING A RESUME CHECK OPERATION IN A MULTI-THREADED...
- Publication number 20140047223
- Publication date Feb 13, 2014
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PADDING FOR MULTI-CHANNEL MEMORY
- Publication number 20130328889
- Publication date Dec 12, 2013
- QUALCOMM Incorporated
- LIN CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CHANNEL SELECTION IN A MULTI-CHANNEL MEMORY SYSTEM
- Publication number 20130326158
- Publication date Dec 5, 2013
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR HANDLING DIVERGENT THREADS IN A MULTI-THREADED PROCE...
- Publication number 20130061027
- Publication date Mar 7, 2013
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR PERFORMING USER-DEFINED CLIPPING IN OBJECT SPACE
- Publication number 20120268484
- Publication date Oct 25, 2012
- QUALCOMM Incorporated
- Ning Bi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR INSTRUCTION LATENCY REDUCTION IN GRAPHICS PRO...
- Publication number 20090213128
- Publication date Aug 27, 2009
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF MAPPING SHADER VARIABLES INTO PHYSICAL REGISTERS
- Publication number 20090085919
- Publication date Apr 2, 2009
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHADER COMPILE SYSTEM AND METHOD
- Publication number 20090089763
- Publication date Apr 2, 2009
- QUALCOMM Incorporated
- Lin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA ACCESS TOOL FOR PROGRAMMABLE GRAPHICS HARDWARE
- Publication number 20090027407
- Publication date Jan 29, 2009
- Alexei V. Bourd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR PERFORMING USER-DEFINED CLIPPING IN OBJECT SPACE
- Publication number 20080062197
- Publication date Mar 13, 2008
- Ning Bi
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Shuffler circuit for lane shuffle in SIMD architecture

General purpose register allocation in streaming processor

Dynamic shader instruction nullification for graphics processing

Techniques for serialized execution in a SIMD processing system

Constant multiplication with texture unit of graphics processing unit

Per-instance preamble for graphics processing

Per-shader preamble for graphics processing

Utilizing pipeline registers as intermediate storage

Skipping of data storage

GPU divergence barrier

Emulation of fused multiply-add operations

Load scheme for shared register in GPU

Padding for multi-channel memory

Selectively activating a resume check operation in a multi-threaded...

Executing subroutines in a multi-threaded processing system

Method and device for performing user-defined clipping in object space

Memory channel selection in a multi-channel memory

Program flow control for multiple divergent SIMD threads using a mi...

Data access tool for programmable graphics hardware

Shader compile system and method

System and method of mapping shader variables into physical registers

Method and device for performing user-defined clipping in object space

System and method for instruction latency reduction in graphics pro...

Patents Applicationslast 30 patents

DYNAMIC SHADER INSTRUCTION NULLIFICATION FOR GRAPHICS PROCESSING

GENERAL PURPOSE REGISTER ALLOCATION IN STREAMING PROCESSOR

SHUFFLER CIRCUIT FOR LANE SHUFFLE IN SIMD ARCHITECTURE

CONSTANT MULTIPLICATION WITH TEXTURE UNIT OF GRAPHICS PROCESSING UNIT

SKIPPING OF DATA STORAGE

EMULATION OF FUSED MULTIPLY-ADD OPERATIONS

VECTOR SCALING INSTRUCTIONS FOR USE IN AN ARITHMETIC LOGIC UNIT

LOAD SCHEME FOR SHARED REGISTER IN GPU

UTILIZING PIPELINE REGISTERS AS INTERMEDIATE STORAGE

TECHNIQUES FOR SERIALIZED EXECUTION IN A SIMD PROCESSING SYSTEM

GPU DIVERGENCE BARRIER

EXECUTING SUBROUTINES IN A MULTI-THREADED PROCESSING SYSTEM

SELECTIVELY ACTIVATING A RESUME CHECK OPERATION IN A MULTI-THREADED...

PADDING FOR MULTI-CHANNEL MEMORY

MEMORY CHANNEL SELECTION IN A MULTI-CHANNEL MEMORY SYSTEM

TECHNIQUES FOR HANDLING DIVERGENT THREADS IN A MULTI-THREADED PROCE...

METHOD AND DEVICE FOR PERFORMING USER-DEFINED CLIPPING IN OBJECT SPACE

SYSTEM AND METHOD FOR INSTRUCTION LATENCY REDUCTION IN GRAPHICS PRO...

SYSTEM AND METHOD OF MAPPING SHADER VARIABLES INTO PHYSICAL REGISTERS

SHADER COMPILE SYSTEM AND METHOD

DATA ACCESS TOOL FOR PROGRAMMABLE GRAPHICS HARDWARE

METHOD AND DEVICE FOR PERFORMING USER-DEFINED CLIPPING IN OBJECT SPACE