Lionel Chien Hui Tay

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit packaging system with interconnect and method of...
- Patent number 8,344,495
- Issue date Jan 1, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan-in interposer on lead frame for an integrated circuit package o...
- Patent number 8,304,869
- Issue date Nov 6, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming PiP with inner known goo...
- Patent number 8,283,209
- Issue date Oct 9, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a conductive via-in-via...
- Patent number 8,283,250
- Issue date Oct 9, 2012
- STATS ChipPAC, Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with leads separated from a die p...
- Patent number 8,278,148
- Issue date Oct 2, 2012
- Stats Chippac Ltd.
- Jeffrey D. Punzalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with integration port
- Patent number 8,273,602
- Issue date Sep 25, 2012
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with chip on lead
- Patent number 8,269,324
- Issue date Sep 18, 2012
- Stats Chippac Ltd.
- Arnel Senosa Trasporto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with package integration
- Patent number 8,258,614
- Issue date Sep 4, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with a leadframe having radial-...
- Patent number 8,252,634
- Issue date Aug 28, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming through hole vias in die...
- Patent number 8,252,666
- Issue date Aug 28, 2012
- STATS ChipPAC, Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level die integration and method
- Patent number 8,241,954
- Issue date Aug 14, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing semiconductor package system with die supp...
- Patent number 8,216,883
- Issue date Jul 10, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with removable backing element ha...
- Patent number 8,212,342
- Issue date Jul 3, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package in package system with adhesiveless pack...
- Patent number 8,203,214
- Issue date Jun 19, 2012
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with multiple device units and me...
- Patent number 8,203,220
- Issue date Jun 19, 2012
- Stats Chippac Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of providing a thermal dissipation...
- Patent number 8,174,098
- Issue date May 8, 2012
- STATS ChipPAC, Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with leaded package and method fo...
- Patent number 8,148,208
- Issue date Apr 3, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with leadfinger
- Patent number 8,148,825
- Issue date Apr 3, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optical semiconductor device having pre-molded leadframe with windo...
- Patent number 8,138,027
- Issue date Mar 20, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked integrated circuit package system with conductive spacer
- Patent number 8,134,227
- Issue date Mar 13, 2012
- Stats Chippac Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with concave terminal
- Patent number 8,134,242
- Issue date Mar 13, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with dual connectivity
- Patent number 8,120,150
- Issue date Feb 21, 2012
- Stats Chippac Ltd.
- Guruprasad Badakere Govindaiah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with dual row lead-frame having...
- Patent number 8,115,287
- Issue date Feb 14, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with thin profile
- Patent number 8,115,305
- Issue date Feb 14, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with plated pad and method of m...
- Patent number 8,106,502
- Issue date Jan 31, 2012
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming wafer level ground plane...
- Patent number 8,097,943
- Issue date Jan 17, 2012
- STATS ChipPAC, Ltd.
- Guruprasad G. Badakere
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with shield and tie bar
- Patent number 8,072,047
- Issue date Dec 6, 2011
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through hole vias at saw streets including protrusions or recesses...
- Patent number 8,072,079
- Issue date Dec 6, 2011
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with redistribution layer
- Patent number 8,043,894
- Issue date Oct 25, 2011
- Stats Chippac Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method of forming similar structure for t...
- Patent number 8,039,302
- Issue date Oct 18, 2011
- STATS ChipPAC, Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming a Conductive Via-in-Via...
- Publication number 20120326329
- Publication date Dec 27, 2012
- STATS ChipPAC, Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming PIP with Inner Known Goo...
- Publication number 20120326302
- Publication date Dec 27, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device with Optical Sensor and Method of Forming Inte...
- Publication number 20120286400
- Publication date Nov 15, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Level Die Integration and Method
- Publication number 20120276691
- Publication date Nov 1, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...
- Publication number 20120261808
- Publication date Oct 18, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLIPCHIP LEADFRAME AND MET...
- Publication number 20120241928
- Publication date Sep 27, 2012
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLATED LEADS AND METHOD OF...
- Publication number 20120241966
- Publication date Sep 27, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Optical Semiconductor Device having Pre-Molded Leadframe with Windo...
- Publication number 20120168806
- Publication date Jul 5, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wafer Level Ground Plane...
- Publication number 20120104601
- Publication date May 3, 2012
- STATS ChipPAC, Ltd.
- Guruprasad G. Badakere
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Through Hole Vias at Saw Streets Including Protrusions or Recesses...
- Publication number 20120034777
- Publication date Feb 9, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Package and Method of Forming Similar Structure for T...
- Publication number 20120001326
- Publication date Jan 5, 2012
- STATS ChipPAC, Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INCREASED CONNECTIVITY AND...
- Publication number 20110298113
- Publication date Dec 8, 2011
- Frederick Rodriguez Dahilig
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD O...
- Publication number 20110284999
- Publication date Nov 24, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Package-on-Package Struc...
- Publication number 20110215458
- Publication date Sep 8, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wirebondless Wafer Level Package with Plated Bumps and Interconnects
- Publication number 20110204512
- Publication date Aug 25, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ETCHED RECESS PACKAGE ON PACKAGE SYSTEM
- Publication number 20110180928
- Publication date Jul 28, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL ROW LEAD-FRAME HAVING...
- Publication number 20110140252
- Publication date Jun 16, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...
- Publication number 20110140251
- Publication date Jun 16, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming PIP with Inner Known Goo...
- Publication number 20110140263
- Publication date Jun 16, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF...
- Publication number 20110140261
- Publication date Jun 16, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE SYSTEM WITH DIE SUPP...
- Publication number 20110129965
- Publication date Jun 2, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device with Bump Interconnection
- Publication number 20110101524
- Publication date May 5, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAP LAYER AND METHOD OF MA...
- Publication number 20110068448
- Publication date Mar 24, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADED PACKAGE AND METHO...
- Publication number 20110068458
- Publication date Mar 24, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device with Optical Sensor and Method of Forming Inte...
- Publication number 20110049662
- Publication date Mar 3, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Providing a Thermal Dissipation...
- Publication number 20110037168
- Publication date Feb 17, 2011
- STATS ChipPAC, Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wafer Level Ground Plane...
- Publication number 20110024903
- Publication date Feb 3, 2011
- STATS ChipPAC, Ltd.
- Guruprasad G. Badakere
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADFRAME HAVING RADIAL-...
- Publication number 20100320590
- Publication date Dec 23, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACT PADS AND METHOD OF...
- Publication number 20100320591
- Publication date Dec 23, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Prefabricated Heat Sprea...
- Publication number 20100320588
- Publication date Dec 23, 2010
- STATS ChipPAC, Ltd.
- Frederick R. Dahilig
- H01 - BASIC ELECTRIC ELEMENTS

Lionel Chien Hui Tay

Person

Patents Grantslast 30 patents

Integrated circuit packaging system with interconnect and method of...

Fan-in interposer on lead frame for an integrated circuit package o...

Semiconductor device and method of forming PiP with inner known goo...

Semiconductor device and method of forming a conductive via-in-via...

Integrated circuit package system with leads separated from a die p...

Integrated circuit package system with integration port

Integrated circuit package system with chip on lead

Integrated circuit package system with package integration

Integrated circuit packaging system with a leadframe having radial-...

Semiconductor device and method of forming through hole vias in die...

Wafer level die integration and method

Method for manufacturing semiconductor package system with die supp...

Integrated circuit package system with removable backing element ha...

Integrated circuit package in package system with adhesiveless pack...

Integrated circuit package system with multiple device units and me...

Semiconductor device and method of providing a thermal dissipation...

Integrated circuit package system with leaded package and method fo...

Integrated circuit package system with leadfinger

Optical semiconductor device having pre-molded leadframe with windo...

Stacked integrated circuit package system with conductive spacer

Integrated circuit package system with concave terminal

Integrated circuit package system with dual connectivity

Integrated circuit packaging system with dual row lead-frame having...

Integrated circuit package system with thin profile

Integrated circuit packaging system with plated pad and method of m...

Semiconductor device and method of forming wafer level ground plane...

Integrated circuit package system with shield and tie bar

Through hole vias at saw streets including protrusions or recesses...

Integrated circuit package system with redistribution layer

Semiconductor package and method of forming similar structure for t...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming a Conductive Via-in-Via...

Semiconductor Device and Method of Forming PIP with Inner Known Goo...

Semiconductor Device with Optical Sensor and Method of Forming Inte...

Wafer Level Die Integration and Method

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLIPCHIP LEADFRAME AND MET...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLATED LEADS AND METHOD OF...

Optical Semiconductor Device having Pre-Molded Leadframe with Windo...

Semiconductor Device and Method of Forming Wafer Level Ground Plane...

Through Hole Vias at Saw Streets Including Protrusions or Recesses...

Semiconductor Package and Method of Forming Similar Structure for T...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INCREASED CONNECTIVITY AND...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD O...

Semiconductor Device and Method of Forming Package-on-Package Struc...

Wirebondless Wafer Level Package with Plated Bumps and Interconnects

ETCHED RECESS PACKAGE ON PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL ROW LEAD-FRAME HAVING...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HA...

Semiconductor Device and Method of Forming PIP with Inner Known Goo...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF...

METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE SYSTEM WITH DIE SUPP...

Semiconductor Device with Bump Interconnection

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAP LAYER AND METHOD OF MA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADED PACKAGE AND METHO...

Semiconductor Device with Optical Sensor and Method of Forming Inte...

Semiconductor Device and Method of Providing a Thermal Dissipation...

Semiconductor Device and Method of Forming Wafer Level Ground Plane...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADFRAME HAVING RADIAL-...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONTACT PADS AND METHOD OF...

Semiconductor Device and Method of Forming Prefabricated Heat Sprea...