Liu Yaocheng

Person

Elmsford, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Structure and method for mobility enhanced MOSFETs with unalloyed s...
- Patent number 9,059,316
- Issue date Jun 16, 2015
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for mobility enhanced MOSFETS with unalloyed s...
- Patent number 8,642,434
- Issue date Feb 4, 2014
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for mobility enhanced MOSFETs with unalloyed s...
- Patent number 8,217,423
- Issue date Jul 10, 2012
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and method of forming the structure
- Patent number 7,932,144
- Issue date Apr 26, 2011
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming stressed SOI FET having doped glass box layer usi...
- Patent number 7,888,197
- Issue date Feb 15, 2011
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS structure including differential channel stressing layer compo...
- Patent number 7,875,511
- Issue date Jan 25, 2011
- International Business Machines Corporation
- Liu Yaocheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Raised STI structure and superdamascene technique for NMOSFET perfo...
- Patent number 7,838,932
- Issue date Nov 23, 2010
- International Business Machines Corporation
- Ashima B. Chakravarti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned super stressed PFET
- Patent number 7,741,658
- Issue date Jun 22, 2010
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and method of forming the structure
- Patent number 7,714,358
- Issue date May 11, 2010
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure for low parasitic gate capacitance
- Patent number 7,709,910
- Issue date May 4, 2010
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low defect Si:C layer with retrograde carbon profile
- Patent number 7,696,000
- Issue date Apr 13, 2010
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with enhanced performance using a simplifie...
- Patent number 7,675,118
- Issue date Mar 9, 2010
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure including doped silicon carbon liner layer...
- Patent number 7,667,263
- Issue date Feb 23, 2010
- International Business Machines Corporation
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Control of poly-Si depletion in CMOS via gas phase doping
- Patent number 7,655,551
- Issue date Feb 2, 2010
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stressed SOI FET having tensile and compressive device regions
- Patent number 7,632,724
- Issue date Dec 15, 2009
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of manufacture
- Patent number 7,615,435
- Issue date Nov 10, 2009
- International Business Machines Corporation
- Oleg Gluschenkov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming CMOS with Si:C source/drain by laser melting and...
- Patent number 7,598,147
- Issue date Oct 6, 2009
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized strain relaxation for strained Si directly on insulator
- Patent number 7,524,740
- Issue date Apr 28, 2009
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-silicide spacer removal
- Patent number 7,504,309
- Issue date Mar 17, 2009
- International Business Machines Corporation
- Thomas W. Dyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
After gate fabrication of field effect transistor having tensile an...
- Patent number 7,485,519
- Issue date Feb 3, 2009
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Control of poly-Si depletion in CMOS via gas phase doping
- Patent number 7,473,626
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Raised STI structure and superdamascene technique for NMOSFET perfo...
- Patent number 7,473,594
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Ashima B. Chakravarti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
N-channel MOSFETs comprising dual stressors, and methods for formin...
- Patent number 7,473,608
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Jinghong H. Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
N-channel MOSFETs comprising dual stressors, and methods for formin...
- Patent number 7,279,758
- Issue date Oct 9, 2007
- International Business Machines Corporation
- Jinghong H. Li
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED S...
- Publication number 20120146092
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED S...
- Publication number 20120149159
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE
- Publication number 20100112766
- Publication date May 6, 2010
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Structure For NFET With Embedded Silicon Carbon
- Publication number 20090181508
- Publication date Jul 16, 2009
- International Business Machines Corporation
- Judson R. Holt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING GATE ELECTRODE FOR GATE OF MOSFET AND STRUCTU...
- Publication number 20090166770
- Publication date Jul 2, 2009
- International Business Machines Corporation
- Oleg Gluschenkov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING CMOS WITH SI:C SOURCE/DRAIN BY LASER MELTING AND...
- Publication number 20090081836
- Publication date Mar 26, 2009
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED SUPER STRESSED PFET
- Publication number 20090050942
- Publication date Feb 26, 2009
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
- Publication number 20090032840
- Publication date Feb 5, 2009
- International Business Machines Corporation
- OLEG GLUSCHENKOV
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE FOR LOW PARASITIC GATE CAPACITANCE
- Publication number 20080258234
- Publication date Oct 23, 2008
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHALLOW TRENCH ISOLATION SELF-ALIGNED TO TEMPLATED RECRYSTALLIZATIO...
- Publication number 20080248626
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING SOI nMOSFET AND THE STRUCTURE THEREOF
- Publication number 20080246041
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AFTER GATE FABRICATION OF FIELD EFFECT TRANSISTOR HAVING TENSILE AN...
- Publication number 20080237709
- Publication date Oct 2, 2008
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS STRUCTURE INCLUDING DIFFERENTIAL CHANNEL STRESSING LAYER COMPO...
- Publication number 20080224218
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROL OF POLY-Si DEPLETION IN CMOS VIA GAS PHASE DOPING
- Publication number 20080217697
- Publication date Sep 11, 2008
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED SILICON MADE BY PRECIPITATING CARBON FROM Si(1-x-y)GexCy A...
- Publication number 20080206965
- Publication date Aug 28, 2008
- International Business Machines Corporation
- Oleg Gluschenkov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESSED SOI FET HAVING TENSILE AND COMPRESSIVE DEVICE REGIONS
- Publication number 20080191281
- Publication date Aug 14, 2008
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE
- Publication number 20080191243
- Publication date Aug 14, 2008
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE INCLUDING DOPED SILICON CARBON LINER LAYER...
- Publication number 20080185636
- Publication date Aug 7, 2008
- International Business Machines Corporation
- Zhijiong Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESSED SOI FET HAVING DOPED GLASS BOX LAYER
- Publication number 20080169508
- Publication date Jul 17, 2008
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED S...
- Publication number 20080164491
- Publication date Jul 10, 2008
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RAISED STI STRUCTURE AND SUPERDAMASCENE TECHNIQUE FOR NMOSFET PERFO...
- Publication number 20080128712
- Publication date Jun 5, 2008
- Ashima B. Chakravarti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW DEFECT SI:C LAYER WITH RETROGRADE CARBON PROFILE
- Publication number 20080128806
- Publication date Jun 5, 2008
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pre-silicide spacer removal
- Publication number 20080090412
- Publication date Apr 17, 2008
- Thomas W. Dyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH ENHANCED PERFORMANCE USING A SIMPLIFIE...
- Publication number 20080054357
- Publication date Mar 6, 2008
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE INCLUDING MULTIPLE STRESSED LAYERS
- Publication number 20080050863
- Publication date Feb 28, 2008
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RAISED STI STRUCTURE AND SUPERDAMASCENE TECHNIQUE FOR NMOSFET PERFO...
- Publication number 20080026516
- Publication date Jan 31, 2008
- International Business Machines Corporation
- Ashima B. Chakravarti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
N-CHANNEL MOSFETS COMPRISING DUAL STRESSORS, AND METHODS FOR FORMIN...
- Publication number 20070281413
- Publication date Dec 6, 2007
- International Business Machines Corporation
- Jinghong H. Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTIMIZED DEEP SOURCE/DRAIN JUNCTIONS WITH THIN POLY GATE IN A FIEL...
- Publication number 20070275532
- Publication date Nov 29, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Control of poly-Si depletion in CMOS via gas phase doping
- Publication number 20070238276
- Publication date Oct 11, 2007
- International Business Machines Corporation
- Yaocheng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS process with Si gates for nFETs and SiGe gates for pFETs
- Publication number 20070235759
- Publication date Oct 11, 2007
- International Business Machines Corporation
- William K. Henson
- H01 - BASIC ELECTRIC ELEMENTS

Liu Yaocheng

Person

Patents Grantslast 30 patents

Structure and method for mobility enhanced MOSFETs with unalloyed s...

Structure and method for mobility enhanced MOSFETS with unalloyed s...

Structure and method for mobility enhanced MOSFETs with unalloyed s...

Semiconductor structure and method of forming the structure

Method of forming stressed SOI FET having doped glass box layer usi...

CMOS structure including differential channel stressing layer compo...

Raised STI structure and superdamascene technique for NMOSFET perfo...

Self-aligned super stressed PFET

Semiconductor structure and method of forming the structure

Semiconductor structure for low parasitic gate capacitance

Low defect Si:C layer with retrograde carbon profile

Semiconductor structure with enhanced performance using a simplifie...

Semiconductor structure including doped silicon carbon liner layer...

Control of poly-Si depletion in CMOS via gas phase doping

Stressed SOI FET having tensile and compressive device regions

Semiconductor device and method of manufacture

Method of forming CMOS with Si:C source/drain by laser melting and...

Localized strain relaxation for strained Si directly on insulator

Pre-silicide spacer removal

After gate fabrication of field effect transistor having tensile an...

Control of poly-Si depletion in CMOS via gas phase doping

Raised STI structure and superdamascene technique for NMOSFET perfo...

N-channel MOSFETs comprising dual stressors, and methods for formin...

N-channel MOSFETs comprising dual stressors, and methods for formin...

Patents Applicationslast 30 patents

STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED S...

STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED S...

SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE

Method and Structure For NFET With Embedded Silicon Carbon

METHOD OF FABRICATING GATE ELECTRODE FOR GATE OF MOSFET AND STRUCTU...

METHOD OF FORMING CMOS WITH SI:C SOURCE/DRAIN BY LASER MELTING AND...

SELF-ALIGNED SUPER STRESSED PFET

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE

SEMICONDUCTOR STRUCTURE FOR LOW PARASITIC GATE CAPACITANCE

SHALLOW TRENCH ISOLATION SELF-ALIGNED TO TEMPLATED RECRYSTALLIZATIO...

METHOD OF FABRICATING SOI nMOSFET AND THE STRUCTURE THEREOF

AFTER GATE FABRICATION OF FIELD EFFECT TRANSISTOR HAVING TENSILE AN...

CMOS STRUCTURE INCLUDING DIFFERENTIAL CHANNEL STRESSING LAYER COMPO...

CONTROL OF POLY-Si DEPLETION IN CMOS VIA GAS PHASE DOPING

STRAINED SILICON MADE BY PRECIPITATING CARBON FROM Si(1-x-y)GexCy A...

STRESSED SOI FET HAVING TENSILE AND COMPRESSIVE DEVICE REGIONS

SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE

SEMICONDUCTOR STRUCTURE INCLUDING DOPED SILICON CARBON LINER LAYER...

STRESSED SOI FET HAVING DOPED GLASS BOX LAYER

STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED S...

RAISED STI STRUCTURE AND SUPERDAMASCENE TECHNIQUE FOR NMOSFET PERFO...

LOW DEFECT SI:C LAYER WITH RETROGRADE CARBON PROFILE

Pre-silicide spacer removal

SEMICONDUCTOR STRUCTURE WITH ENHANCED PERFORMANCE USING A SIMPLIFIE...

SEMICONDUCTOR STRUCTURE INCLUDING MULTIPLE STRESSED LAYERS

RAISED STI STRUCTURE AND SUPERDAMASCENE TECHNIQUE FOR NMOSFET PERFO...

N-CHANNEL MOSFETS COMPRISING DUAL STRESSORS, AND METHODS FOR FORMIN...

OPTIMIZED DEEP SOURCE/DRAIN JUNCTIONS WITH THIN POLY GATE IN A FIEL...

Control of poly-Si depletion in CMOS via gas phase doping

CMOS process with Si gates for nFETs and SiGe gates for pFETs