Lizabeth Keser

Person

Munich, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Fan out package with integrated peripheral devices and methods
- Patent number 11,955,395
- Issue date Apr 9, 2024
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip scale thin 3D die stacked package
- Patent number 11,581,287
- Issue date Feb 14, 2023
- Intel Corporation
- Robert Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan out package and methods
- Patent number 11,508,637
- Issue date Nov 22, 2022
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan out package with integrated peripheral devices and methods
- Patent number 11,404,339
- Issue date Aug 2, 2022
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Face-up fan-out electronic package with passive components using a...
- Patent number 11,211,337
- Issue date Dec 28, 2021
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Molded substrate package in fan-out wafer level package
- Patent number 10,720,393
- Issue date Jul 21, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan out package with integrated peripheral devices and methods
- Patent number 10,699,980
- Issue date Jun 30, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package including an integrated routing layer and a molded routing...
- Patent number 10,665,522
- Issue date May 26, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Face-up fan-out electronic package with passive components using a...
- Patent number 10,546,817
- Issue date Jan 28, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Molded substrate package in fan-out wafer level package
- Patent number 10,403,580
- Issue date Sep 3, 2019
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS
- Publication number 20240194552
- Publication date Jun 13, 2024
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS
- Publication number 20220336306
- Publication date Oct 20, 2022
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FACE-UP FAN-OUT ELECTRONIC PACKAGE WITH PASSIVE COMPONENTS USING A...
- Publication number 20220051990
- Publication date Feb 17, 2022
- Intel Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS
- Publication number 20200303274
- Publication date Sep 24, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN OUT PACKAGE AND METHODS
- Publication number 20200251396
- Publication date Aug 6, 2020
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FACE-UP FAN-OUT ELECTRONIC PACKAGE WITH PASSIVE COMPONENTS USING A...
- Publication number 20200105678
- Publication date Apr 2, 2020
- Intell IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP SCALE THIN 3D DIE STACKED PACKAGE
- Publication number 20200006293
- Publication date Jan 2, 2020
- Intel Corporation
- Robert SANKMAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOLDED SUBSTRATE PACKAGE IN FAN-OUT WAFER LEVEL PACKAGE
- Publication number 20190393154
- Publication date Dec 26, 2019
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS
- Publication number 20190304863
- Publication date Oct 3, 2019
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FACE-UP FAN-OUT ELECTRONIC PACKAGE WITH PASSIVE COMPONENTS USING A...
- Publication number 20190206799
- Publication date Jul 4, 2019
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER WITH ANGLED VIAS
- Publication number 20190206777
- Publication date Jul 4, 2019
- Intel IP Corporation
- Sonja Koller
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MOLDED SUBSTRATE PACKAGE IN FAN-OUT WAFER LEVEL PACKAGE
- Publication number 20190206800
- Publication date Jul 4, 2019
- Intel IP Corporation
- Lizabeth Keser
- H01 - BASIC ELECTRIC ELEMENTS

Lizabeth Keser

Person

Patents Grantslast 30 patents

Fan out package with integrated peripheral devices and methods

Chip scale thin 3D die stacked package

Fan out package and methods

Fan out package with integrated peripheral devices and methods

Face-up fan-out electronic package with passive components using a...

Molded substrate package in fan-out wafer level package

Fan out package with integrated peripheral devices and methods

Package including an integrated routing layer and a molded routing...

Face-up fan-out electronic package with passive components using a...

Molded substrate package in fan-out wafer level package

Patents Applicationslast 30 patents

FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS

FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS

FACE-UP FAN-OUT ELECTRONIC PACKAGE WITH PASSIVE COMPONENTS USING A...

FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS

FAN OUT PACKAGE AND METHODS

FACE-UP FAN-OUT ELECTRONIC PACKAGE WITH PASSIVE COMPONENTS USING A...

CHIP SCALE THIN 3D DIE STACKED PACKAGE

MOLDED SUBSTRATE PACKAGE IN FAN-OUT WAFER LEVEL PACKAGE

FAN OUT PACKAGE WITH INTEGRATED PERIPHERAL DEVICES AND METHODS

FACE-UP FAN-OUT ELECTRONIC PACKAGE WITH PASSIVE COMPONENTS USING A...

INTERPOSER WITH ANGLED VIAS

MOLDED SUBSTRATE PACKAGE IN FAN-OUT WAFER LEVEL PACKAGE