Ljubisa Bajic

Person

Toronto, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Computational circuit with hierarchical accumulator
- Patent number 12,118,060
- Issue date Oct 15, 2024
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core with meta data actuated conditional graph execution
- Patent number 12,050,913
- Issue date Jul 30, 2024
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core with data associative adaptive rounding
- Patent number 12,039,289
- Issue date Jul 16, 2024
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data structure optimized dedicated memory caches
- Patent number 12,019,546
- Issue date Jun 25, 2024
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Seamless place and route for heterogenous network of processor cores
- Patent number 11,960,885
- Issue date Apr 16, 2024
- Tenstorrent Inc.
- Jasmina Vasiljevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive oscillator for clock generation
- Patent number 11,936,382
- Issue date Mar 19, 2024
- Advanced Micro Devices, Inc.
- Joyce Cheuk Wai Wong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Application data flow graph execution using network-on-chip overlay
- Patent number 11,934,897
- Issue date Mar 19, 2024
- Tenstorrent Inc.
- Jasmina Vasiljevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor cores using packet identifiers for routing and computation
- Patent number 11,829,752
- Issue date Nov 28, 2023
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overlay layer hardware unit for network of processor cores
- Patent number 11,734,224
- Issue date Aug 22, 2023
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparsity uniformity enforcement for multicore processor
- Patent number 11,709,662
- Issue date Jul 25, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparsity uniformity enforcement for multicore processor
- Patent number 11,693,639
- Issue date Jul 4, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core with data associative adaptive rounding
- Patent number 11,645,041
- Issue date May 9, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data structure optimized dedicated memory caches
- Patent number 11,520,701
- Issue date Dec 6, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overlay layer for network of processor cores
- Patent number 11,467,846
- Issue date Oct 11, 2022
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core with operation suppression based on contribution es...
- Patent number 11,301,264
- Issue date Apr 12, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor cores using packet identifiers for routing and computation
- Patent number 11,269,628
- Issue date Mar 8, 2022
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative resource allocation for routing on interconnect fabrics
- Patent number 11,245,643
- Issue date Feb 8, 2022
- Tenstorrent Inc.
- Ivan Matosevic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Processing core with metadata actuated conditional graph execution
- Patent number 11,113,051
- Issue date Sep 7, 2021
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core with data associative adaptive rounding
- Patent number 11,010,132
- Issue date May 18, 2021
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core data compression and storage system
- Patent number 10,938,413
- Issue date Mar 2, 2021
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core with metadata actuated conditional graph execution
- Patent number 10,817,293
- Issue date Oct 27, 2020
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core data compression and storage system
- Patent number 10,644,721
- Issue date May 5, 2020
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core with operation suppression based on contribution es...
- Patent number 10,585,679
- Issue date Mar 10, 2020
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive oscillator for clock generation
- Patent number 10,382,014
- Issue date Aug 13, 2019
- ATI Technologies ULC
- Joyce Cheuk Wai Wong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processing core with operation suppression based on contribution es...
- Patent number 10,318,317
- Issue date Jun 11, 2019
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for managing power among a plurality of proces...
- Patent number 9,348,656
- Issue date May 24, 2016
- Advanced Micro Devices, Inc.
- Stephen D. Presant
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Processor bridge power management
- Patent number 9,043,625
- Issue date May 26, 2015
- Advanced Micro Devices, Inc.
- Maurice B. Steinman
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Dynamic weight calculation in a digital power estimation and manage...
- Patent number 8,650,428
- Issue date Feb 11, 2014
- ATI Technologies ULC
- Lejla Bajic
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Dynamically controlled power reduction method and circuit for a gra...
- Patent number 8,102,398
- Issue date Jan 24, 2012
- ATI Technologies ULC
- Ljubisa Bajic
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION
- Publication number 20240345840
- Publication date Oct 17, 2024
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING
- Publication number 20240338176
- Publication date Oct 10, 2024
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEAMLESS PLACE AND ROUTE FOR HETEROGENEOUS NETWORK OF PROCESSOR CORES
- Publication number 20240319996
- Publication date Sep 26, 2024
- Tenstorrent Inc.
- Jasmina Vasiljevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLICATION HARDWARE BLOCK WITH ADAPTIVE FIDELITY CONTROL SYSTEM
- Publication number 20240111525
- Publication date Apr 4, 2024
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEAMLESS PLACE AND ROUTE FOR HETEROGENOUS NETWORK OF PROCESSOR CORES
- Publication number 20230325183
- Publication date Oct 12, 2023
- Tenstorrent Inc.
- Jasmina Vasiljevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSITY UNIFORMITY ENFORCEMENT FOR MULTICORE PROCESSOR
- Publication number 20230325160
- Publication date Oct 12, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVERLAY LAYER HARDWARE UNIT FOR NETWORK OF PROCESSOR CORES
- Publication number 20230281155
- Publication date Sep 7, 2023
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME PREDICTORS FOR COMPUTATION REDUCTION IN DEPENDENT COMPUTATIONS
- Publication number 20230259579
- Publication date Aug 17, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING
- Publication number 20230244447
- Publication date Aug 3, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR CORES USING CONTENT OBJECT IDENTIFIERS FOR ROUTING AND CO...
- Publication number 20230236831
- Publication date Jul 27, 2023
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME PREDICTORS FOR NEURAL NETWORK COMPUTATION REDUCTION
- Publication number 20230196124
- Publication date Jun 22, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL CIRCUIT WITH HIERARCHICAL ACCUMULATOR
- Publication number 20230177106
- Publication date Jun 8, 2023
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sparsity Uniformity Enforcement for Multicore Processor
- Publication number 20230146541
- Publication date May 11, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sparsity Uniformity Enforcement for Multicore Processor
- Publication number 20230143538
- Publication date May 11, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES
- Publication number 20230062891
- Publication date Mar 2, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES
- Publication number 20230041130
- Publication date Feb 9, 2023
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPH EXECUTION USING ACCESS REQUEST RESPONSE DYNAMIC BATCH ASSEMBLY
- Publication number 20220318614
- Publication date Oct 6, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES
- Publication number 20220318144
- Publication date Oct 6, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPLICATION DATA FLOW GRAPH EXECUTION USING NETWORK-ON-CHIP OVERLAY
- Publication number 20220245009
- Publication date Aug 4, 2022
- Tenstorrent Inc.
- Jasmina Vasiljevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ES...
- Publication number 20220222086
- Publication date Jul 14, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR CORES USING PACKET IDENTIFIERS FOR ROUTING AND COMPUTATION
- Publication number 20220188106
- Publication date Jun 16, 2022
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Overlay Layer Hardware Unit for Network of Processor Cores
- Publication number 20220100503
- Publication date Mar 31, 2022
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION
- Publication number 20210382716
- Publication date Dec 9, 2021
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE RESOURCE ALLOCATION FOR ROUTING ON INTERCONNECT FABRICS
- Publication number 20210367905
- Publication date Nov 25, 2021
- Tenstorrent Inc.
- Ivan Matosevic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING
- Publication number 20210271450
- Publication date Sep 2, 2021
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing Core with Meta Data Actuated Conditional Graph Execution
- Publication number 20210042118
- Publication date Feb 11, 2021
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES
- Publication number 20210034373
- Publication date Feb 4, 2021
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR CORES USING PACKET IDENTIFIERS FOR ROUTING AND COMPUTATION
- Publication number 20200401402
- Publication date Dec 24, 2020
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE DATA COMPRESSION AND STORAGE SYSTEM
- Publication number 20200244282
- Publication date Jul 30, 2020
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ES...
- Publication number 20200174799
- Publication date Jun 4, 2020
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING

Ljubisa Bajic

Person

Patents Grantslast 30 patents

Computational circuit with hierarchical accumulator

Processing core with meta data actuated conditional graph execution

Processing core with data associative adaptive rounding

Data structure optimized dedicated memory caches

Seamless place and route for heterogenous network of processor cores

Adaptive oscillator for clock generation

Application data flow graph execution using network-on-chip overlay

Processor cores using packet identifiers for routing and computation

Overlay layer hardware unit for network of processor cores

Sparsity uniformity enforcement for multicore processor

Sparsity uniformity enforcement for multicore processor

Processing core with data associative adaptive rounding

Data structure optimized dedicated memory caches

Overlay layer for network of processor cores

Processing core with operation suppression based on contribution es...

Processor cores using packet identifiers for routing and computation

Speculative resource allocation for routing on interconnect fabrics

Processing core with metadata actuated conditional graph execution

Processing core with data associative adaptive rounding

Processing core data compression and storage system

Processing core with metadata actuated conditional graph execution

Processing core data compression and storage system

Processing core with operation suppression based on contribution es...

Adaptive oscillator for clock generation

Processing core with operation suppression based on contribution es...

Apparatus and method for managing power among a plurality of proces...

Processor bridge power management

Dynamic weight calculation in a digital power estimation and manage...

Dynamically controlled power reduction method and circuit for a gra...

Patents Applicationslast 30 patents

PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION

PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING

SEAMLESS PLACE AND ROUTE FOR HETEROGENEOUS NETWORK OF PROCESSOR CORES

MULTIPLICATION HARDWARE BLOCK WITH ADAPTIVE FIDELITY CONTROL SYSTEM

SEAMLESS PLACE AND ROUTE FOR HETEROGENOUS NETWORK OF PROCESSOR CORES

SPARSITY UNIFORMITY ENFORCEMENT FOR MULTICORE PROCESSOR

OVERLAY LAYER HARDWARE UNIT FOR NETWORK OF PROCESSOR CORES

RUNTIME PREDICTORS FOR COMPUTATION REDUCTION IN DEPENDENT COMPUTATIONS

PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING

PROCESSOR CORES USING CONTENT OBJECT IDENTIFIERS FOR ROUTING AND CO...

RUNTIME PREDICTORS FOR NEURAL NETWORK COMPUTATION REDUCTION

COMPUTATIONAL CIRCUIT WITH HIERARCHICAL ACCUMULATOR

Sparsity Uniformity Enforcement for Multicore Processor

Sparsity Uniformity Enforcement for Multicore Processor

DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES

OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES

GRAPH EXECUTION USING ACCESS REQUEST RESPONSE DYNAMIC BATCH ASSEMBLY

DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES

APPLICATION DATA FLOW GRAPH EXECUTION USING NETWORK-ON-CHIP OVERLAY

PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ES...

PROCESSOR CORES USING PACKET IDENTIFIERS FOR ROUTING AND COMPUTATION

Overlay Layer Hardware Unit for Network of Processor Cores

PROCESSING CORE WITH METADATA ACTUATED CONDITIONAL GRAPH EXECUTION

SPECULATIVE RESOURCE ALLOCATION FOR ROUTING ON INTERCONNECT FABRICS

PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING

Processing Core with Meta Data Actuated Conditional Graph Execution

OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES

PROCESSOR CORES USING PACKET IDENTIFIERS FOR ROUTING AND COMPUTATION

PROCESSING CORE DATA COMPRESSION AND STORAGE SYSTEM

PROCESSING CORE WITH OPERATION SUPPRESSION BASED ON CONTRIBUTION ES...