Lordson L. Yue

Person

Foster City, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Core off sleep mode with low exit latency
- Patent number 12,019,498
- Issue date Jun 25, 2024
- NVIDIA Corporation
- Thomas E. Dewey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock gating coupled memory retention circuit
- Patent number 11,003,238
- Issue date May 11, 2021
- NVIDIA Corporation
- Anand Shanmugam Sundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system, and method for clipping graphics primitives with...
- Patent number 8,432,406
- Issue date Apr 30, 2013
- NVIDIA Corporation
- Lordson L. Yue
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method and system for patching instructions in a shader for a 3-D g...
- Patent number 7,852,341
- Issue date Dec 14, 2010
- NVIDIA Corporation
- Christian Rouet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system, and method for determining clipping distances
- Patent number 7,714,877
- Issue date May 11, 2010
- NVIDIA Corporation
- Vimal S. Parikh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system, and method for clipping graphics primitives
- Patent number 7,616,218
- Issue date Nov 10, 2009
- NVIDIA Corporation
- Vimal S. Parikh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable clipping engine for clipping graphics primitives
- Patent number 7,542,046
- Issue date Jun 2, 2009
- NVIDIA Corporation
- Lordson L. Yue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for compact multi-ported register file
- Patent number 7,490,208
- Issue date Feb 10, 2009
- NVIDIA Corporation
- Lordson Yue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system, and method for clipping graphics primitives with...
- Patent number 7,439,988
- Issue date Oct 21, 2008
- NVIDIA Corporation
- Vimal S. Parikh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system, and method for clipping graphics primitives with...
- Patent number 7,420,572
- Issue date Sep 2, 2008
- NVIDIA Corporation
- Lordson L. Yue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system, and method for clipping graphics primitives with...
- Patent number 7,292,254
- Issue date Nov 6, 2007
- NVIDIA Corporation
- Lordson L. Yue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimal initial rasterization starting point
- Patent number 7,224,364
- Issue date May 29, 2007
- ATI International SRL
- Lordson L. Yue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Approximation circuit and method
- Patent number 6,581,085
- Issue date Jun 17, 2003
- ATI International SRL
- Lordson L. Yue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheduler for avoiding bank conflicts in issuing concurrent request...
- Patent number 6,507,886
- Issue date Jan 14, 2003
- ATI International SRL
- Andrea Y. J. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for detecting bank conflicts in accessing adjace...
- Patent number 6,393,512
- Issue date May 21, 2002
- ATI International SRL
- Andrea Y. J. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheduler for avoiding bank conflicts in issuing concurrent request...
- Patent number 6,393,534
- Issue date May 21, 2002
- ATI International SRL
- Andrea Y. J. Chen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CORE OFF SLEEP MODE WITH LOW EXIT LATENCY
- Publication number 20190163255
- Publication date May 30, 2019
- NVIDIA Corporation
- Thomas E. DEWEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORE OFF SLEEP MODE WITH LOW EXIT LATENCY
- Publication number 20190163254
- Publication date May 30, 2019
- NVIDIA Corporation
- Thomas E. DEWEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK GATING COUPLED MEMORY RETENTION CIRCUIT
- Publication number 20180284874
- Publication date Oct 4, 2018
- NVIDIA Corporation
- Anand Shanmugam SUNDARARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRIVIAL DISCARD OF TRIANGLES REUSING REGIONAL COMPARISONS
- Publication number 20010040583
- Publication date Nov 15, 2001
- ATI Internation, SRL
- LORDSON L. YUE
- G06 - COMPUTING CALCULATING COUNTING

Lordson L. Yue

Person

Patents Grantslast 30 patents

Core off sleep mode with low exit latency

Clock gating coupled memory retention circuit

Apparatus, system, and method for clipping graphics primitives with...

Method and system for patching instructions in a shader for a 3-D g...

Apparatus, system, and method for determining clipping distances

Apparatus, system, and method for clipping graphics primitives

Programmable clipping engine for clipping graphics primitives

Architecture for compact multi-ported register file

Apparatus, system, and method for clipping graphics primitives with...

Apparatus, system, and method for clipping graphics primitives with...

Apparatus, system, and method for clipping graphics primitives with...

Optimal initial rasterization starting point

Approximation circuit and method

Scheduler for avoiding bank conflicts in issuing concurrent request...

Circuit and method for detecting bank conflicts in accessing adjace...

Scheduler for avoiding bank conflicts in issuing concurrent request...

Patents Applicationslast 30 patents

CORE OFF SLEEP MODE WITH LOW EXIT LATENCY

CORE OFF SLEEP MODE WITH LOW EXIT LATENCY

CLOCK GATING COUPLED MEMORY RETENTION CIRCUIT

TRIVIAL DISCARD OF TRIANGLES REUSING REGIONAL COMPARISONS