Lorenzo Fratin

Person

Buccinasco, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Split pillar architectures for memory devices
- Patent number 12,178,054
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a split pillar architecture
- Patent number 12,171,105
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array having air gaps
- Patent number 12,156,411
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method for manufacturing the same
- Patent number 12,150,317
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
Information Patent Grant
Decoding for a memory device
- Patent number 12,148,467
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-selecting memory array with horizontal access lines
- Patent number 12,100,447
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture of three-dimensional memory device and methods regardi...
- Patent number 12,068,192
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Chalcogenide memory device compositions
- Patent number 11,997,937
- Issue date May 28, 2024
- Micron Technology, Inc.
- Dale W. Collins
- C01 - INORGANIC CHEMISTRY
Information Patent Grant
Memory cells with sidewall and bulk regions in vertical structures
- Patent number 11,957,068
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
Information Patent Grant
Method for manufacturing a memory device and memory device manufact...
- Patent number 11,943,938
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Paolo Fantini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory array
- Patent number 11,925,036
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Sidewall structures for memory cells in vertical structures
- Patent number 11,903,333
- Issue date Feb 13, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross point array architecture for multiple decks
- Patent number 11,895,851
- Issue date Feb 6, 2024
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoding architecture for word line tiles
- Patent number 11,894,103
- Issue date Feb 6, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoding architecture for memory devices
- Patent number 11,869,577
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with laterally formed memory cells
- Patent number 11,864,475
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Thomas M. Graettinger
Information Patent Grant
Memory cells with sidewall and bulk regions in planar structures
- Patent number 11,825,754
- Issue date Nov 21, 2023
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Word line structures for three-dimensional memory arrays
- Patent number 11,804,252
- Issue date Oct 31, 2023
- Micron Technology, Inc.
- Stephen W. Russell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatuses including multi-level memory cells and methods of opera...
- Patent number 11,798,620
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoding for a memory device
- Patent number 11,790,987
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Microelectronic devices with self-aligned interconnects, and relate...
- Patent number 11,764,146
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Stephen W. Russell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three dimensional memory arrays
- Patent number 11,696,454
- Issue date Jul 4, 2023
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Grant
Composite electrode material chemistry
- Patent number 11,659,778
- Issue date May 23, 2023
- Micron Technology, Inc.
- Pengyuan Zheng
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Decoding architecture for memory devices
- Patent number 11,587,606
- Issue date Feb 21, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with graded memory stack resistances
- Patent number 11,538,860
- Issue date Dec 27, 2022
- Micron Technology, Inc.
- Fabio Pellizzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatuses including multi-level memory cells and methods of opera...
- Patent number 11,482,280
- Issue date Oct 25, 2022
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses including multi-level memory cells and methods of opera...
- Patent number 11,443,799
- Issue date Sep 13, 2022
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoding for a memory device
- Patent number 11,423,981
- Issue date Aug 23, 2022
- Micron Technology, Inc.
- Paolo Fantini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoding for a memory device
- Patent number 11,417,394
- Issue date Aug 16, 2022
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for forming self-aligned memory structures
- Patent number 11,417,841
- Issue date Aug 16, 2022
- Micron Technology, Inc.
- Stephen W. Russell
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS TO INCREASE CELL DENSITY USING A LATERAL ETCH
- Publication number 20240357815
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Paolo Fantini
Information Patent Application
MEMORY CELLS WITH SIDEWALL AND BULK REGIONS IN VERTICAL STRUCTURES
- Publication number 20240315150
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
Information Patent Application
TRENCH AND MULTIPLE PIER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY...
- Publication number 20240312521
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Application
SIDEWALL STRUCTURES FOR MEMORY CELLS IN VERTICAL STRUCTURES
- Publication number 20240298553
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
CHALCOGENIDE MEMORY DEVICE COMPOSITIONS
- Publication number 20240292766
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Dale W. Collins
- C01 - INORGANIC CHEMISTRY
Information Patent Application
SPLIT PILLAR AND PIER MEMORY ARCHITECTURES
- Publication number 20240284660
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
LATERAL SPLIT DIGIT LINE MEMORY ARCHITECTURES
- Publication number 20240284659
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS
- Publication number 20240268127
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR MANUFACTURING A MEMORY DEVICE AND MEMORY DEVICE MANUFACT...
- Publication number 20240237365
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Paolo Fantini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DECODING ARCHITECTURE FOR MEMORY DEVICES
- Publication number 20240203481
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH LATERALLY FORMED MEMORY CELLS
- Publication number 20240196765
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Thomas M. Graettinger
Information Patent Application
DECODING ARCHITECTURE FOR WORD LINE TILES
- Publication number 20240161801
- Publication date May 16, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELLS WITH SIDEWALL AND BULK REGIONS IN PLANAR STRUCTURES
- Publication number 20240147872
- Publication date May 2, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES HAVING ONE-TIME-PROGRAMMABLE FUSES AND/OR ANTIFUSES...
- Publication number 20240074168
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Paolo Fantini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PILLAR AND WORD LINE PLATE ARCHITECTURE FOR A MEMORY ARRAY
- Publication number 20240057348
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WORD LINE STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20240029772
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Stephen W. Russell
- G11 - INFORMATION STORAGE
Information Patent Application
DECODER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY DEVICES
- Publication number 20230395128
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL FORMATION IN THREE DIMENSIONAL MEMORY ARRAYS USING ATOM...
- Publication number 20230354721
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Paolo Fantini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY ARRAY HAVING AIR GAPS
- Publication number 20230337441
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20230329010
- Publication date Oct 12, 2023
- Micron Technology, Inc.
- Fabio Pellizzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPARSE PIERS FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20230309426
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Stephen W. Russell
- G11 - INFORMATION STORAGE
Information Patent Application
DENSE PIERS FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20230309326
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Stephen W. Russell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WORD LINE STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20230307025
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Stephen W. Russell
- G11 - INFORMATION STORAGE
Information Patent Application
CHALCOGENIDE MEMORY DEVICE COMPOSITIONS
- Publication number 20230270025
- Publication date Aug 24, 2023
- Micron Technology, Inc.
- Dale W. Collins
- C01 - INORGANIC CHEMISTRY
Information Patent Application
DECODING ARCHITECTURE FOR MEMORY DEVICES
- Publication number 20230238050
- Publication date Jul 27, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS
- Publication number 20230114077
- Publication date Apr 13, 2023
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Application
DECODING FOR A MEMORY DEVICE
- Publication number 20230032006
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR FORMING SELF-ALIGNED MEMORY STRUCTURES
- Publication number 20230027799
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Stephen W. Russell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-SELECTING MEMORY ARRAY WITH HORIZONTAL ACCESS LINES
- Publication number 20230005535
- Publication date Jan 5, 2023
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
DECODING FOR A MEMORY DEVICE
- Publication number 20220415392
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE

Lorenzo Fratin

Person

Patents Grantslast 30 patents

Split pillar architectures for memory devices

Memory device with a split pillar architecture

Memory array having air gaps

Memory device and method for manufacturing the same

Decoding for a memory device

Self-selecting memory array with horizontal access lines

Architecture of three-dimensional memory device and methods regardi...

Chalcogenide memory device compositions

Memory cells with sidewall and bulk regions in vertical structures

Method for manufacturing a memory device and memory device manufact...

Three-dimensional memory array

Sidewall structures for memory cells in vertical structures

Cross point array architecture for multiple decks

Decoding architecture for word line tiles

Decoding architecture for memory devices

Memory device with laterally formed memory cells

Memory cells with sidewall and bulk regions in planar structures

Word line structures for three-dimensional memory arrays

Apparatuses including multi-level memory cells and methods of opera...

Decoding for a memory device

Microelectronic devices with self-aligned interconnects, and relate...

Three dimensional memory arrays

Composite electrode material chemistry

Decoding architecture for memory devices

Memory array with graded memory stack resistances

Apparatuses including multi-level memory cells and methods of opera...

Apparatuses including multi-level memory cells and methods of opera...

Decoding for a memory device

Decoding for a memory device

Techniques for forming self-aligned memory structures

Patents Applicationslast 30 patents

METHODS TO INCREASE CELL DENSITY USING A LATERAL ETCH

MEMORY CELLS WITH SIDEWALL AND BULK REGIONS IN VERTICAL STRUCTURES

TRENCH AND MULTIPLE PIER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY...

SIDEWALL STRUCTURES FOR MEMORY CELLS IN VERTICAL STRUCTURES

CHALCOGENIDE MEMORY DEVICE COMPOSITIONS

SPLIT PILLAR AND PIER MEMORY ARCHITECTURES

LATERAL SPLIT DIGIT LINE MEMORY ARCHITECTURES

CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS

METHOD FOR MANUFACTURING A MEMORY DEVICE AND MEMORY DEVICE MANUFACT...

DECODING ARCHITECTURE FOR MEMORY DEVICES

MEMORY DEVICE WITH LATERALLY FORMED MEMORY CELLS

DECODING ARCHITECTURE FOR WORD LINE TILES

MEMORY CELLS WITH SIDEWALL AND BULK REGIONS IN PLANAR STRUCTURES

MEMORY DEVICES HAVING ONE-TIME-PROGRAMMABLE FUSES AND/OR ANTIFUSES...

PILLAR AND WORD LINE PLATE ARCHITECTURE FOR A MEMORY ARRAY

WORD LINE STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS

DECODER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY DEVICES

MEMORY CELL FORMATION IN THREE DIMENSIONAL MEMORY ARRAYS USING ATOM...

MEMORY ARRAY HAVING AIR GAPS

TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS

SPARSE PIERS FOR THREE-DIMENSIONAL MEMORY ARRAYS

DENSE PIERS FOR THREE-DIMENSIONAL MEMORY ARRAYS

WORD LINE STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS

CHALCOGENIDE MEMORY DEVICE COMPOSITIONS

DECODING ARCHITECTURE FOR MEMORY DEVICES

CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS

DECODING FOR A MEMORY DEVICE

TECHNIQUES FOR FORMING SELF-ALIGNED MEMORY STRUCTURES

SELF-SELECTING MEMORY ARRAY WITH HORIZONTAL ACCESS LINES

DECODING FOR A MEMORY DEVICE