Louis C. Parrillo

Person

Warren, NJ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods for fabricating latchup-preventing CMOS device
- Patent number 4,766,090
- Issue date Aug 23, 1988
- American Telephone and Telegraph Company, AT&T Bell Laboratories
- Gerald A. Coquin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for preventing latchup in CMOS devices
- Patent number 4,762,802
- Issue date Aug 9, 1988
- American Telephone and Telegraph Company AT&T, Bell Laboratories
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating CMOS devices
- Patent number 4,656,730
- Issue date Apr 14, 1987
- American Telephone and Telegraph Company, AT&T Bell Laboratories
- William T. Lynch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Latchup-preventing CMOS device
- Patent number 4,647,957
- Issue date Mar 3, 1987
- AT&T Bell Laboratories
- Gerald A. Coquin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Latchup-preventing CMOS device
- Patent number 4,646,123
- Issue date Feb 24, 1987
- AT&T Bell Laboratories
- William T. Lynch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitrided silicon dioxide layers for semiconductor integrated circuits
- Patent number 4,623,912
- Issue date Nov 18, 1986
- AT&T Bell Laboratories
- Chuan C. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ethylene glycol etch for processes using metal silicides
- Patent number 4,569,722
- Issue date Feb 11, 1986
- AT&T Bell Laboratories
- Alvaro Maury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS Integrated circuit technology utilizing dual implantation of s...
- Patent number 4,554,726
- Issue date Nov 26, 1985
- AT&T Bell Laboratories
- Steven J. Hillenius
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming complementary integrated circuit devices
- Patent number 4,435,895
- Issue date Mar 13, 1984
- Bell Telephone Laboratories, Incorporated
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating complementary field effect transistor devices
- Patent number 4,435,896
- Issue date Mar 13, 1984
- Bell Telephone Laboratories, Incorporated
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS

Louis C. Parrillo

Person

Patents Grantslast 30 patents

Methods for fabricating latchup-preventing CMOS device

Method for preventing latchup in CMOS devices

Method for fabricating CMOS devices

Latchup-preventing CMOS device

Latchup-preventing CMOS device

Nitrided silicon dioxide layers for semiconductor integrated circuits

Ethylene glycol etch for processes using metal silicides

CMOS Integrated circuit technology utilizing dual implantation of s...

Process for forming complementary integrated circuit devices

Method for fabricating complementary field effect transistor devices