Louis Chao-Chiuan Liu

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Hsin-Chu, TW

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Patents Grantslast 30 patents

Information Patent Grant
Systematic method for variable layout shrink
- Patent number 8,286,119
- Issue date Oct 9, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Fu-Chieh Hsu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DESIGN-DRIVEN METAL CRITICAL DIMENSION (CD) BIASING
- Publication number 20100293514
- Publication date Nov 18, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Louis Chao-Chiuan Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Performance Modeling of Integrated Circuits
- Publication number 20100229137
- Publication date Sep 9, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Louis Chao-Chiuan Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systematic Method for Variable Layout Shrink
- Publication number 20100199238
- Publication date Aug 5, 2010
- Fu-Chieh Hsu
- G06 - COMPUTING CALCULATING COUNTING