Louis K. Scheffer

Person

Campbell, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Robust design using manufacturability models
- Patent number 8,898,617
- Issue date Nov 25, 2014
- Cadence Design Systems, Inc.
- David White
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method, system, and computer program product for preparing multiple...
- Patent number 8,769,453
- Issue date Jul 1, 2014
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Aware manufacturing of integrated circuits
- Patent number 8,713,484
- Issue date Apr 29, 2014
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and system for context-specific mask inspection
- Patent number 8,407,627
- Issue date Mar 26, 2013
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Aware manufacturing of an integrated circuit
- Patent number 8,302,061
- Issue date Oct 30, 2012
- Cadence Design Systems, Inc.
- Akira Fujimura
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for approximating diagonal lines in placement
- Patent number 8,201,128
- Issue date Jun 12, 2012
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for incorporation of patterns and design rule che...
- Patent number 8,136,056
- Issue date Mar 13, 2012
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Robust design using manufacturability models
- Patent number 8,122,392
- Issue date Feb 21, 2012
- Cadence Design Systems, Inc.
- David White
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and system for representing manufacturing and lithography in...
- Patent number 8,117,566
- Issue date Feb 14, 2012
- Cadence Design Systems, Inc.
- Louis Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for statistical design rule checking
- Patent number 8,103,982
- Issue date Jan 24, 2012
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for representing manufacturing and lithography in...
- Patent number 8,103,986
- Issue date Jan 24, 2012
- Cadence Design Systems, Inc.
- Louis Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Manufacturing aware design and design aware manufacturing of an int...
- Patent number 8,020,135
- Issue date Sep 13, 2011
- Cadence Design Systems, Inc.
- Akira Fujimura
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method, system, and computer program product for determining three-...
- Patent number 7,962,866
- Issue date Jun 14, 2011
- Cadence Design Systems, Inc.
- David White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and computer program product for predicting thin fi...
- Patent number 7,937,674
- Issue date May 3, 2011
- Cadence Design Systems, Inc.
- David White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and computer program product for preparing multiple...
- Patent number 7,827,519
- Issue date Nov 2, 2010
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Supplant design rules in electronic designs
- Patent number 7,814,447
- Issue date Oct 12, 2010
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for context-specific mask writing
- Patent number 7,784,016
- Issue date Aug 24, 2010
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method, system, and computer program product for timing closure in...
- Patent number 7,721,237
- Issue date May 18, 2010
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Manufacturing aware design of integrated circuit layouts
- Patent number 7,712,064
- Issue date May 4, 2010
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for representing manufacturing and lithography in...
- Patent number 7,627,847
- Issue date Dec 1, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical integrated circuit design with uncertain design conditions
- Patent number 7,546,562
- Issue date Jun 9, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for chip design using physically appropriate comp...
- Patent number 7,533,359
- Issue date May 12, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for accounting for process variation in the design of integr...
- Patent number 7,474,999
- Issue date Jan 6, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Manufacturing aware design and design aware manufacturing
- Patent number 7,395,516
- Issue date Jul 1, 2008
- Cadence Design Systems, Inc.
- Akira Fujimura
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and system for context-specific mask writing
- Patent number 7,302,672
- Issue date Nov 27, 2007
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for designing integrated circuit layouts
- Patent number 7,254,798
- Issue date Aug 7, 2007
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for context-specific mask writing
- Patent number 7,249,342
- Issue date Jul 24, 2007
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and system for context-specific mask inspection
- Patent number 7,231,628
- Issue date Jun 12, 2007
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Automatic insertion of clocked elements into an electronic design t...
- Patent number 7,207,024
- Issue date Apr 17, 2007
- Cadence Design Sytems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for designing integrated circuit layouts
- Patent number 7,082,588
- Issue date Jul 25, 2006
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR APPROXIMATING DIAGONAL LINES IN PLACEMENT
- Publication number 20120297354
- Publication date Nov 22, 2012
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROBUST DESIGN USING MANUFACTURABILITY MODELS
- Publication number 20120151422
- Publication date Jun 14, 2012
- Cadence Design Systems, Inc.
- David White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AWARE MANUFACTURING OF AN INTEGRATED CIRCUIT
- Publication number 20110314436
- Publication date Dec 22, 2011
- Akira Fujimura
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PREPARING MULTIPLE...
- Publication number 20110046767
- Publication date Feb 24, 2011
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AWARE MANUFACTURING OF INTEGRATED CIRCUITS
- Publication number 20100180247
- Publication date Jul 15, 2010
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Accounting for Process Variation in the Design of Integr...
- Publication number 20090199145
- Publication date Aug 6, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Implementing a Complex System or Process
- Publication number 20090164184
- Publication date Jun 25, 2009
- Cadence Design Systems, Inc.
- Ted Vucurevich
- G05 - CONTROLLING REGULATING
Information Patent Application
Method and System for Representing Manufacturing and Lithography In...
- Publication number 20090077520
- Publication date Mar 19, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Representing Manufacturing and Lithography In...
- Publication number 20090077521
- Publication date Mar 19, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROBUST DESIGN USING MANUFACTURABILITY MODELS
- Publication number 20090031271
- Publication date Jan 29, 2009
- Cadence Design Systems, Inc.
- David White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Manufacturing Aware Design and Design Aware Manufacturing
- Publication number 20080307371
- Publication date Dec 11, 2008
- Akira Fujimura
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PREPARING MULTIPLE...
- Publication number 20080163139
- Publication date Jul 3, 2008
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR DETERMINING THREE-...
- Publication number 20080163142
- Publication date Jul 3, 2008
- Cadence Design Systems, Inc.
- David White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR TIMING CLOSURE IN...
- Publication number 20080163148
- Publication date Jul 3, 2008
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPLANT DESIGN RULES IN ELECTRONIC DESIGNS
- Publication number 20080163141
- Publication date Jul 3, 2008
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR CONCURRENT MODEL A...
- Publication number 20080162103
- Publication date Jul 3, 2008
- Cadence Design Systems, Inc.
- David White
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PREDICTING THIN FI...
- Publication number 20080160646
- Publication date Jul 3, 2008
- Cadence Design Systems, Inc.
- David White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR APPROXIMATING DIAGONAL LINES IN PLACEMENT
- Publication number 20080005711
- Publication date Jan 3, 2008
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Context-Specific Mask Writing
- Publication number 20070266364
- Publication date Nov 15, 2007
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and System for Context-Specific Mask Inspection
- Publication number 20070233419
- Publication date Oct 4, 2007
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and system for incorporation of patterns and design rule che...
- Publication number 20070006114
- Publication date Jan 4, 2007
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for increased accuracy for extraction of electric...
- Publication number 20060265677
- Publication date Nov 23, 2006
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Manufacturing Aware Deisgn and Design Aware Manufacturing
- Publication number 20060265679
- Publication date Nov 23, 2006
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for statistical design rule checking
- Publication number 20060265674
- Publication date Nov 23, 2006
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for chip design using physically appropriate comp...
- Publication number 20060265680
- Publication date Nov 23, 2006
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for designing integrated circuit layouts
- Publication number 20050246674
- Publication date Nov 3, 2005
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for designing integrated circuit layouts
- Publication number 20050246675
- Publication date Nov 3, 2005
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for context-specific mask writing
- Publication number 20050216877
- Publication date Sep 29, 2005
- Cadence Design Systems, Inc.
- Robert C. Pack
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method for creating patterns for producing integrated circuits
- Publication number 20050015739
- Publication date Jan 20, 2005
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic insertion of clocked elements into an electronic design t...
- Publication number 20040158806
- Publication date Aug 12, 2004
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING

Louis K. Scheffer

Person

Patents Grantslast 30 patents

Robust design using manufacturability models

Method, system, and computer program product for preparing multiple...

Aware manufacturing of integrated circuits

Method and system for context-specific mask inspection

Aware manufacturing of an integrated circuit

Method and apparatus for approximating diagonal lines in placement

Method and system for incorporation of patterns and design rule che...

Robust design using manufacturability models

Method and system for representing manufacturing and lithography in...

System and method for statistical design rule checking

Method and system for representing manufacturing and lithography in...

Manufacturing aware design and design aware manufacturing of an int...

Method, system, and computer program product for determining three-...

Method, system, and computer program product for predicting thin fi...

Method, system, and computer program product for preparing multiple...

Supplant design rules in electronic designs

Method and system for context-specific mask writing

Method, system, and computer program product for timing closure in...

Manufacturing aware design of integrated circuit layouts

Method and system for representing manufacturing and lithography in...

Physical integrated circuit design with uncertain design conditions

Method and system for chip design using physically appropriate comp...

Method for accounting for process variation in the design of integr...

Manufacturing aware design and design aware manufacturing

Method and system for context-specific mask writing

Method and apparatus for designing integrated circuit layouts

Method and system for context-specific mask writing

Method and system for context-specific mask inspection

Automatic insertion of clocked elements into an electronic design t...

Method and apparatus for designing integrated circuit layouts

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR APPROXIMATING DIAGONAL LINES IN PLACEMENT

ROBUST DESIGN USING MANUFACTURABILITY MODELS

AWARE MANUFACTURING OF AN INTEGRATED CIRCUIT

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PREPARING MULTIPLE...

AWARE MANUFACTURING OF INTEGRATED CIRCUITS

Method for Accounting for Process Variation in the Design of Integr...

Method and System for Implementing a Complex System or Process

Method and System for Representing Manufacturing and Lithography In...

Method and System for Representing Manufacturing and Lithography In...

ROBUST DESIGN USING MANUFACTURABILITY MODELS

Manufacturing Aware Design and Design Aware Manufacturing

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PREPARING MULTIPLE...

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR DETERMINING THREE-...

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR TIMING CLOSURE IN...

SUPPLANT DESIGN RULES IN ELECTRONIC DESIGNS

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR CONCURRENT MODEL A...

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PREDICTING THIN FI...

METHOD AND APPARATUS FOR APPROXIMATING DIAGONAL LINES IN PLACEMENT

Method and System for Context-Specific Mask Writing

Method and System for Context-Specific Mask Inspection

Method and system for incorporation of patterns and design rule che...

Method and system for increased accuracy for extraction of electric...

Manufacturing Aware Deisgn and Design Aware Manufacturing

System and method for statistical design rule checking

Method and system for chip design using physically appropriate comp...

Method and apparatus for designing integrated circuit layouts

Method and apparatus for designing integrated circuit layouts

Method and system for context-specific mask writing

Method for creating patterns for producing integrated circuits

Automatic insertion of clocked elements into an electronic design t...