Luca Fasoli

Person

Campbell, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Program cycle skip
- Patent number RE46348
- Issue date Mar 21, 2017
- SanDisk Technologies LLC
- Gopinath Balakrishnan
Information Patent Grant
Page buffer program command and methods to reprogram pages without...
- Patent number RE46154
- Issue date Sep 20, 2016
- SanDisk Technologies LLC
- Luca Fasoli
Information Patent Grant
Method for non-volatile memory having 3D array of read/write elemen...
- Patent number 9,245,629
- Issue date Jan 26, 2016
- Sandisk 3D LLC
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level memory arrays with memory cells that employ bipolar sto...
- Patent number 9,105,576
- Issue date Aug 11, 2015
- Sandisk 3D LLC
- Yung-Tin Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with sectional data lines
- Patent number 8,982,597
- Issue date Mar 17, 2015
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with sectional data lines
- Patent number 8,913,413
- Issue date Dec 16, 2014
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level memory arrays with memory cells that employ bipolar sto...
- Patent number 8,841,648
- Issue date Sep 23, 2014
- Sandisk 3D LLC
- Yung-Tin Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory having 3D array of read/write elements and read...
- Patent number 8,824,191
- Issue date Sep 2, 2014
- Sandisk 3D LLC
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Grant
Continuous programming of non-volatile memory
- Patent number 8,780,651
- Issue date Jul 15, 2014
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with data line switching scheme
- Patent number 8,711,596
- Issue date Apr 29, 2014
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device incorporating segmented array line...
- Patent number 8,659,028
- Issue date Feb 25, 2014
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device incorporating segmented array line...
- Patent number 8,637,870
- Issue date Jan 28, 2014
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with data line switching scheme
- Patent number 8,638,586
- Issue date Jan 28, 2014
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional memory system with page of data across word lines
- Patent number 8,553,476
- Issue date Oct 8, 2013
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory having 3D array of read/write elements with eff...
- Patent number 8,547,720
- Issue date Oct 1, 2013
- Sandisk 3D LLC
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory having 3D array of read/write elements and read...
- Patent number 8,526,237
- Issue date Sep 3, 2013
- Sandisk 3D LLC
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array circuit incorporating multiple array block selection a...
- Patent number 8,509,025
- Issue date Aug 13, 2013
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Program cycle skip
- Patent number 8,427,890
- Issue date Apr 23, 2013
- Sandisk 3D LLC
- Gopinath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Grant
Program cycle skip
- Patent number 8,395,948
- Issue date Mar 12, 2013
- Sandisk 3D LLC
- Gopinath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Grant
Page buffer program command and methods to reprogram pages without...
- Patent number 8,397,024
- Issue date Mar 12, 2013
- Sandisk 3D LLC
- Luca Fasoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with sectional data lines
- Patent number 8,358,528
- Issue date Jan 22, 2013
- SanDisk 3D, LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with improved block switching
- Patent number 8,320,196
- Issue date Nov 27, 2012
- Sandisk 3D LLC
- Thomas Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitive discharge method for writing to non-volatile memory
- Patent number 8,310,892
- Issue date Nov 13, 2012
- SanDisk 3D, LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoder circuitry providing forward and reverse modes of memory arr...
- Patent number 8,279,704
- Issue date Oct 2, 2012
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with data line switching scheme
- Patent number 8,279,650
- Issue date Oct 2, 2012
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Continuous programming of non-volatile memory
- Patent number 8,238,174
- Issue date Aug 7, 2012
- Sandisk 3D LLC
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory array architecture incorporating 1T-1R near 4F2...
- Patent number 8,233,309
- Issue date Jul 31, 2012
- Sandisk 3D LLC
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Page register outside array and sense amplifier interface
- Patent number 8,223,525
- Issue date Jul 17, 2012
- Sandisk 3D LLC
- Gopinath Balakrishnan
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Program cycle skip
- Patent number 8,213,243
- Issue date Jul 3, 2012
- Sandisk 3D LLC
- Gopinath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional array of re-programmable non-volatile memory elem...
- Patent number 8,199,576
- Issue date Jun 12, 2012
- Sandisk 3D LLC
- Luca Fasoli
- B82 - NANO-TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
XOR DATA RECOVERY SCHEMES NONVOLATILE MEMORY DEVICES
- Publication number 20240347122
- Publication date Oct 17, 2024
- SanDisk Technologies LLC
- Xiang Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL MEMORY ARRAYS WITH MEMORY CELLS THAT EMPLOY BIPOLAR STO...
- Publication number 20140346433
- Publication date Nov 27, 2014
- Yung-Tin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Method For Non-Volatile Memory Having 3D Array of Read/Write Elemen...
- Publication number 20140043911
- Publication date Feb 13, 2014
- SanDisk 3D LLC
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY HAVING 3D ARRAY OF READ/WRITE ELEMENTS AND READ...
- Publication number 20140022848
- Publication date Jan 23, 2014
- SanDisk 3D LLC
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME
- Publication number 20130010523
- Publication date Jan 10, 2013
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
CONTINUOUS PROGRAMMING OF NON-VOLATILE MEMORY
- Publication number 20120287734
- Publication date Nov 15, 2012
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME
- Publication number 20120257433
- Publication date Oct 11, 2012
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM CYCLE SKIP
- Publication number 20120243349
- Publication date Sep 27, 2012
- Gopinath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM CYCLE SKIP
- Publication number 20120236663
- Publication date Sep 20, 2012
- Gopinath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL MEMORY SYSTEM WITH PAGE OF DATA ACROSS WORD LINES
- Publication number 20120224409
- Publication date Sep 6, 2012
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM WITH SECTIONAL DATA LINES
- Publication number 20120170346
- Publication date Jul 5, 2012
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM WITH SECTIONAL DATA LINES
- Publication number 20120170347
- Publication date Jul 5, 2012
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED ARRAY LINE...
- Publication number 20120106253
- Publication date May 3, 2012
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-LEVEL MEMORY ARRAYS WITH MEMORY CELLS THAT EMPLOY BIPOLAR STO...
- Publication number 20120091427
- Publication date Apr 19, 2012
- Yung-Tin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
CAPACITIVE DISCHARGE METHOD FOR WRITING TO NON-VOLATILE MEMORY
- Publication number 20120008373
- Publication date Jan 12, 2012
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Memory With Improved Block Switching
- Publication number 20120002476
- Publication date Jan 5, 2012
- Thomas Yan
- G11 - INFORMATION STORAGE
Information Patent Application
CONTINUOUS PROGRAMMING OF NON-VOLATILE MEMORY
- Publication number 20110305071
- Publication date Dec 15, 2011
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY CIRCUIT INCORPORATING MULTIPLE ARRAY BLOCK SELECTION A...
- Publication number 20110299354
- Publication date Dec 8, 2011
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
Non-Volatile Memory Having 3d Array of Read/Write Elements with Eff...
- Publication number 20110299314
- Publication date Dec 8, 2011
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Application
Non-Volatile Memory Having 3d Array of Read/Write Elements and Read...
- Publication number 20110299340
- Publication date Dec 8, 2011
- George Samachisa
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM WITH SECTIONAL DATA LINES
- Publication number 20110182105
- Publication date Jul 28, 2011
- Tianhong Yan
- G11 - INFORMATION STORAGE
Information Patent Application
Rewritable Memory Device with Multi-Level, Write-Once Memory Cells
- Publication number 20110149631
- Publication date Jun 23, 2011
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM CYCLE SKIP
- Publication number 20110141832
- Publication date Jun 16, 2011
- Gopinath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Application
PAGE REGISTER OUTSIDE ARRAY AND SENSE AMPLIFIER INTERFACE
- Publication number 20110141788
- Publication date Jun 16, 2011
- Gopinath Balakrishnan
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ARRAY ARCHITECTURE INCORPORATING 1T-1R NEAR 4F2...
- Publication number 20110096588
- Publication date Apr 28, 2011
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Memory With Improved Memory Block Switching
- Publication number 20110032774
- Publication date Feb 10, 2011
- Thomas Yan
- G11 - INFORMATION STORAGE
Information Patent Application
DECODER CIRCUITRY PROVIDING FORWARD AND REVERSE MODES OF MEMORY ARR...
- Publication number 20110019495
- Publication date Jan 27, 2011
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
LIMITED CHARGE DELIVERY FOR PROGRAMMING NON-VOLATILE STORAGE ELEMENTS
- Publication number 20100302835
- Publication date Dec 2, 2010
- Andrei Mihnea
- G11 - INFORMATION STORAGE
Information Patent Application
Reduced complexity array line drivers for 3D matrix arrays
- Publication number 20100271885
- Publication date Oct 28, 2010
- SANDISK 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME
- Publication number 20100265750
- Publication date Oct 21, 2010
- Tianhong Yan
- G11 - INFORMATION STORAGE

Luca Fasoli

Person

Patents Grantslast 30 patents

Program cycle skip

Page buffer program command and methods to reprogram pages without...

Method for non-volatile memory having 3D array of read/write elemen...

Multi-level memory arrays with memory cells that employ bipolar sto...

Memory system with sectional data lines

Memory system with sectional data lines

Multi-level memory arrays with memory cells that employ bipolar sto...

Non-volatile memory having 3D array of read/write elements and read...

Continuous programming of non-volatile memory

Memory system with data line switching scheme

Three-dimensional memory device incorporating segmented array line...

Three-dimensional memory device incorporating segmented array line...

Memory system with data line switching scheme

Three dimensional memory system with page of data across word lines

Non-volatile memory having 3D array of read/write elements with eff...

Non-volatile memory having 3D array of read/write elements and read...

Memory array circuit incorporating multiple array block selection a...

Program cycle skip

Program cycle skip

Page buffer program command and methods to reprogram pages without...

Memory system with sectional data lines

Semiconductor memory with improved block switching

Capacitive discharge method for writing to non-volatile memory

Decoder circuitry providing forward and reverse modes of memory arr...

Memory system with data line switching scheme

Continuous programming of non-volatile memory

Non-volatile memory array architecture incorporating 1T-1R near 4F2...

Page register outside array and sense amplifier interface

Program cycle skip

Three-dimensional array of re-programmable non-volatile memory elem...

Patents Applicationslast 30 patents

XOR DATA RECOVERY SCHEMES NONVOLATILE MEMORY DEVICES

MULTI-LEVEL MEMORY ARRAYS WITH MEMORY CELLS THAT EMPLOY BIPOLAR STO...

Method For Non-Volatile Memory Having 3D Array of Read/Write Elemen...

NON-VOLATILE MEMORY HAVING 3D ARRAY OF READ/WRITE ELEMENTS AND READ...

MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME

CONTINUOUS PROGRAMMING OF NON-VOLATILE MEMORY

MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME

PROGRAM CYCLE SKIP

PROGRAM CYCLE SKIP

THREE DIMENSIONAL MEMORY SYSTEM WITH PAGE OF DATA ACROSS WORD LINES

MEMORY SYSTEM WITH SECTIONAL DATA LINES

MEMORY SYSTEM WITH SECTIONAL DATA LINES

THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED ARRAY LINE...

MULTI-LEVEL MEMORY ARRAYS WITH MEMORY CELLS THAT EMPLOY BIPOLAR STO...

CAPACITIVE DISCHARGE METHOD FOR WRITING TO NON-VOLATILE MEMORY

Semiconductor Memory With Improved Block Switching

CONTINUOUS PROGRAMMING OF NON-VOLATILE MEMORY

MEMORY ARRAY CIRCUIT INCORPORATING MULTIPLE ARRAY BLOCK SELECTION A...

Non-Volatile Memory Having 3d Array of Read/Write Elements with Eff...

Non-Volatile Memory Having 3d Array of Read/Write Elements and Read...

MEMORY SYSTEM WITH SECTIONAL DATA LINES

Rewritable Memory Device with Multi-Level, Write-Once Memory Cells

PROGRAM CYCLE SKIP

PAGE REGISTER OUTSIDE ARRAY AND SENSE AMPLIFIER INTERFACE

NON-VOLATILE MEMORY ARRAY ARCHITECTURE INCORPORATING 1T-1R NEAR 4F2...

Semiconductor Memory With Improved Memory Block Switching

DECODER CIRCUITRY PROVIDING FORWARD AND REVERSE MODES OF MEMORY ARR...

LIMITED CHARGE DELIVERY FOR PROGRAMMING NON-VOLATILE STORAGE ELEMENTS

Reduced complexity array line drivers for 3D matrix arrays

MEMORY SYSTEM WITH DATA LINE SWITCHING SCHEME