Luigi Pascucci

Person

Milano, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Programming non-volatile electronic memory device with NAND archite...
- Patent number 10,825,525
- Issue date Nov 3, 2020
- Micron Technology, Inc.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a common source select line for two memory porti...
- Patent number 10,825,524
- Issue date Nov 3, 2020
- Micron Technology, Inc.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic memory device having two portions that can be decoupled
- Patent number 10,170,191
- Issue date Jan 1, 2019
- Micron Technology, Inc.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor field-effect transistor, memory cell and memory device
- Patent number 9,287,284
- Issue date Mar 15, 2016
- Micron Technology, Inc.
- Paolo Rolandi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile electronic memory device with NAND structure being mon...
- Patent number 8,824,205
- Issue date Sep 2, 2014
- Micron Technology, Inc.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor field-effect transistor, memory cell and memory device
- Patent number 8,759,915
- Issue date Jun 24, 2014
- Micron Technology, Inc.
- Paolo Rolandi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile electronic memory device with NAND structure being mon...
- Patent number 8,630,115
- Issue date Jan 14, 2014
- Micron Technology, Inc.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuration terminal for integrated devices and method for config...
- Patent number 8,030,765
- Issue date Oct 4, 2011
- STMicroelectronics S.r.l.
- Luigi Pascucci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for accessing in reading, writing and programming to a NAND...
- Patent number 7,649,778
- Issue date Jan 19, 2010
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for accessing in reading, writing and programming to a nand...
- Patent number 7,529,881
- Issue date May 5, 2009
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Row decoder circuit and related system and method
- Patent number 7,525,851
- Issue date Apr 28, 2009
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuration terminal for integrated devices and method for config...
- Patent number 7,501,705
- Issue date Mar 10, 2009
- STMicroelectronics S.r.l.
- Luigi Pascucci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for refreshing a memory device during reading the...
- Patent number 7,417,900
- Issue date Aug 26, 2008
- STMicroelectronics S.r.l.
- Paolo Rolandi
- G11 - INFORMATION STORAGE
Information Patent Grant
Read/verify circuit for multilevel memory cells with ramp read volt...
- Patent number 7,397,702
- Issue date Jul 8, 2008
- STMicroelectronics S.r.l.
- Paolo Rolandi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory electronic device with NAND structure being mon...
- Patent number 7,397,700
- Issue date Jul 8, 2008
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated electronic non-volatile memory device having nand structure
- Patent number 7,295,472
- Issue date Nov 13, 2007
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory electronic device with NAND structure being mon...
- Patent number 7,274,594
- Issue date Sep 25, 2007
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Pointer circuit
- Patent number 7,181,592
- Issue date Feb 20, 2007
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile latch circuit
- Patent number 7,031,189
- Issue date Apr 18, 2006
- STMicroelectronics, SRL
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory system including selection transistors
- Patent number 7,023,728
- Issue date Apr 4, 2006
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Binary-number comparator
- Patent number 7,016,931
- Issue date Mar 21, 2006
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for controlling programming voltage levels of non-volatile m...
- Patent number 6,967,876
- Issue date Nov 22, 2005
- STMicroelectronics S.r.l.
- Paolo Rolandi
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for fabricating a dual charge storage location memory cell
- Patent number 6,958,510
- Issue date Oct 25, 2005
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Line selector for a matrix of memory elements
- Patent number 6,930,927
- Issue date Aug 16, 2005
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming method of the memory cells in a multilevel non-volatile...
- Patent number 6,920,066
- Issue date Jul 19, 2005
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrically-programmable non-volatile memory cell
- Patent number 6,882,001
- Issue date Apr 19, 2005
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reducing spurious erasing during programming of a nonvol...
- Patent number 6,826,083
- Issue date Nov 30, 2004
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronization circuit for read paths of an electronic memory
- Patent number 6,804,756
- Issue date Oct 12, 2004
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with improved differential reading system
- Patent number 6,700,819
- Issue date Mar 2, 2004
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Grant
Interlaced memory device with random or sequential access
- Patent number 6,701,419
- Issue date Mar 2, 2004
- STMicroelectronics S.r.l.
- Francesco Tomaiuolo
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ELECTRONIC MEMORY DEVICE HAVING TWO PORTIONS THAT CAN BE DECOUPLED
- Publication number 20190147957
- Publication date May 16, 2019
- Micron Technology, Inc.
- LUIGI PASCUCCI
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC MEMORY DEVICE HAVING TWO PORTIONS THAT CAN BE DECOUPLED
- Publication number 20190147958
- Publication date May 16, 2019
- Micron Technology, Inc.
- LUIGI PASCUCCI
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC MEMORY DEVICE HAVING TWO PORTIONS THAT CAN BE DECOUPLED
- Publication number 20170316832
- Publication date Nov 2, 2017
- Micron Technology, Inc.
- LUIGI PASCUCCI
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATIVE ELECTRONIC MEMORY DEVICE WITH NAND STRUCTURE BEING MON...
- Publication number 20140347930
- Publication date Nov 27, 2014
- LUIGI PASCUCCI
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Field-Effect Transistor, Memory Cell and Memory Device
- Publication number 20140302649
- Publication date Oct 9, 2014
- Paolo Rolandi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-Volatile Electronic Memory Device With NAND Structure Being Mon...
- Publication number 20110286269
- Publication date Nov 24, 2011
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR FIELD-EFFECT TRANSISTOR, MEMORY CELL AND MEMORY DEVICE
- Publication number 20100213529
- Publication date Aug 26, 2010
- Paolo Rolandi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFIGURATION TERMINAL FOR INTEGRATED DEVICES AND METHOD FOR CONFIG...
- Publication number 20090256248
- Publication date Oct 15, 2009
- STMicroelectronics S.r.l.
- Luigi Pascucci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Accessing in Reading, Writing and Programming to a NAND...
- Publication number 20090180328
- Publication date Jul 16, 2009
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR REFRESHING A MEMORY DEVICE DURING READING THE...
- Publication number 20070279996
- Publication date Dec 6, 2007
- STMicroelectronics S.r.l.
- Paolo Rolandi
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR ACCESSING IN READING, WRITING AND PROGRAMMING TO A NAND...
- Publication number 20070153578
- Publication date Jul 5, 2007
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MON...
- Publication number 20060274577
- Publication date Dec 7, 2006
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Row decoder circuit and related system and method
- Publication number 20060268650
- Publication date Nov 30, 2006
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MON...
- Publication number 20060239076
- Publication date Oct 26, 2006
- STMicroelectronics S.r.I.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MON...
- Publication number 20060227609
- Publication date Oct 12, 2006
- STMicroelectronics S.r.I.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED ELECTRONIC NON VOLATILE MEMORY DEVICE HAVING NAND STRUCTURE
- Publication number 20060227610
- Publication date Oct 12, 2006
- STMicroelectronics S.r.I.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Configuration terminal for integrated devices and method for config...
- Publication number 20060103001
- Publication date May 18, 2006
- STMicroelectronics S.r.l.
- Luigi Pascucci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Read/verify circuit for multilevel memory cells with ramp read volt...
- Publication number 20060028872
- Publication date Feb 9, 2006
- STMicroelectronics S.r.l.
- Paolo Rolandi
- G11 - INFORMATION STORAGE
Information Patent Application
Method for controlling programming voltage levels of non-volatile m...
- Publication number 20050068803
- Publication date Mar 31, 2005
- STMicroelectronics S.r.l.
- Paolo Rolandi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory system including selection transistors
- Publication number 20040190335
- Publication date Sep 30, 2004
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Line selector for a matrix of memory elements
- Publication number 20040062132
- Publication date Apr 1, 2004
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Programming method of the memory cells in a multilevel non-volatile...
- Publication number 20040037144
- Publication date Feb 26, 2004
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile latch circuit
- Publication number 20040008539
- Publication date Jan 15, 2004
- STMicroelectronics S.r.I.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Method for reducing spurious erasing during programming of a nonvol...
- Publication number 20030235100
- Publication date Dec 25, 2003
- STMicroelectronics S.r. I.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Electrically-programmable non-volatile memory cell
- Publication number 20030197217
- Publication date Oct 23, 2003
- STMicroelectronics S.r.I.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Binary encoding circuit
- Publication number 20030122693
- Publication date Jul 3, 2003
- STMicroelectronics S.r. I.
- Luigi Pascucci
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Process for fabricating a dual charge storage location memory cell
- Publication number 20030119258
- Publication date Jun 26, 2003
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE
Information Patent Application
Pointer circuit
- Publication number 20030101328
- Publication date May 29, 2003
- STMicroelectronics S.r.l.
- Luigi Pascucci
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Binary-number comparator
- Publication number 20030023654
- Publication date Jan 30, 2003
- Luigi Pascucci
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory with improved differential reading system
- Publication number 20030016572
- Publication date Jan 23, 2003
- STMicroelectronics S.r. I.
- Luigi Pascucci
- G11 - INFORMATION STORAGE

Luigi Pascucci

Person

Patents Grantslast 30 patents

Programming non-volatile electronic memory device with NAND archite...

Memory device with a common source select line for two memory porti...

Electronic memory device having two portions that can be decoupled

Semiconductor field-effect transistor, memory cell and memory device

Non-volatile electronic memory device with NAND structure being mon...

Semiconductor field-effect transistor, memory cell and memory device

Non-volatile electronic memory device with NAND structure being mon...

Configuration terminal for integrated devices and method for config...

Method for accessing in reading, writing and programming to a NAND...

Method for accessing in reading, writing and programming to a nand...

Row decoder circuit and related system and method

Configuration terminal for integrated devices and method for config...

Method and system for refreshing a memory device during reading the...

Read/verify circuit for multilevel memory cells with ramp read volt...

Non-volatile memory electronic device with NAND structure being mon...

Integrated electronic non-volatile memory device having nand structure

Non-volatile memory electronic device with NAND structure being mon...

Pointer circuit

Non-volatile latch circuit

Semiconductor memory system including selection transistors

Binary-number comparator

Method for controlling programming voltage levels of non-volatile m...

Process for fabricating a dual charge storage location memory cell

Line selector for a matrix of memory elements

Programming method of the memory cells in a multilevel non-volatile...

Electrically-programmable non-volatile memory cell

Method for reducing spurious erasing during programming of a nonvol...

Synchronization circuit for read paths of an electronic memory

Memory with improved differential reading system

Interlaced memory device with random or sequential access

Patents Applicationslast 30 patents

ELECTRONIC MEMORY DEVICE HAVING TWO PORTIONS THAT CAN BE DECOUPLED

ELECTRONIC MEMORY DEVICE HAVING TWO PORTIONS THAT CAN BE DECOUPLED

ELECTRONIC MEMORY DEVICE HAVING TWO PORTIONS THAT CAN BE DECOUPLED

NON-VOLATIVE ELECTRONIC MEMORY DEVICE WITH NAND STRUCTURE BEING MON...

Semiconductor Field-Effect Transistor, Memory Cell and Memory Device

Non-Volatile Electronic Memory Device With NAND Structure Being Mon...

SEMICONDUCTOR FIELD-EFFECT TRANSISTOR, MEMORY CELL AND MEMORY DEVICE

CONFIGURATION TERMINAL FOR INTEGRATED DEVICES AND METHOD FOR CONFIG...

Method for Accessing in Reading, Writing and Programming to a NAND...

METHOD AND SYSTEM FOR REFRESHING A MEMORY DEVICE DURING READING THE...

METHOD FOR ACCESSING IN READING, WRITING AND PROGRAMMING TO A NAND...

NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MON...

Row decoder circuit and related system and method

NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MON...

NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MON...

INTEGRATED ELECTRONIC NON VOLATILE MEMORY DEVICE HAVING NAND STRUCTURE

Configuration terminal for integrated devices and method for config...

Read/verify circuit for multilevel memory cells with ramp read volt...

Method for controlling programming voltage levels of non-volatile m...

Semiconductor memory system including selection transistors

Line selector for a matrix of memory elements

Programming method of the memory cells in a multilevel non-volatile...

Non-volatile latch circuit

Method for reducing spurious erasing during programming of a nonvol...

Electrically-programmable non-volatile memory cell

Binary encoding circuit

Process for fabricating a dual charge storage location memory cell

Pointer circuit

Binary-number comparator

Memory with improved differential reading system