Lun ZHAO

Person

Ballston Lake, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Forming self-aligned NiSi placement with improved performance and y...
- Patent number 9,607,989
- Issue date Mar 28, 2017
- GLOBALFOUNDRIES Inc.
- Xusheng Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication methods facilitating integration of different device ar...
- Patent number 9,570,586
- Issue date Feb 14, 2017
- GLOBALFOUNDRIES Inc.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of removing fins so as to form isolation structures on prod...
- Patent number 9,455,198
- Issue date Sep 27, 2016
- GLOBALFOUNDRIES Inc.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic stack excluding SiARC and method of using same
- Patent number 9,431,528
- Issue date Aug 30, 2016
- GLOBALFOUNDRIES Inc.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer spacer used in finFET
- Patent number 9,419,101
- Issue date Aug 16, 2016
- GLOBALFOUNDRIES Inc.
- Jianwei Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Uniform exposed raised structures for non-planar semiconductor devices
- Patent number 9,362,176
- Issue date Jun 7, 2016
- GLOBALFOUNDRIES Inc.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-phase source/drain/gate spacer-epi formation
- Patent number 9,337,306
- Issue date May 10, 2016
- GLOBALFOUNDRIES Inc.
- Jianwei Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Eliminating field oxide loss prior to FinFET source/drain epitaxial...
- Patent number 9,324,713
- Issue date Apr 26, 2016
- GLOBALFOUNDRIES Inc.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Devices and methods of forming finFETs with self aligned fin formation
- Patent number 9,147,696
- Issue date Sep 29, 2015
- GLOBALFOUNDRIES Inc.
- Jing Wan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified, etch-resistant gate structure(s) facilitating circuit fab...
- Patent number 9,093,561
- Issue date Jul 28, 2015
- GLOBALFOUNDRIES, INC.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing gate expansion after source and drain implant in gate last...
- Patent number 9,059,218
- Issue date Jun 16, 2015
- GLOBALFOUNDRIES Inc.
- Bharat Krishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin-type transistor structures with extended embedded stress elemen...
- Patent number 9,024,368
- Issue date May 5, 2015
- GLOBALFOUNDRIES Inc.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Uniform gate height for semiconductor structure with N and P type fins
- Patent number 8,987,083
- Issue date Mar 24, 2015
- GLOBALFOUNDRIES Inc.
- Zhenyu Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of reverse shallow trench isolation structures with sup...
- Patent number 8,815,699
- Issue date Aug 26, 2014
- GLOBALFOUNDRIES Inc.
- Tong Weihua
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ELIMINATING FIELD OXIDE LOSS PRIOR TO FINFET SOURCE/DRAIN EPITAXIAL...
- Publication number 20160276345
- Publication date Sep 22, 2016
- GLOBALFOUNDRIES INC.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING SELF-ALIGNED NiSi PLACEMENT WITH IMPROVED PERFORMANCE AND Y...
- Publication number 20160163702
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Xusheng WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-PHASE SOURCE/DRAIN/GATE SPACER-EPI FORMATION
- Publication number 20150380515
- Publication date Dec 31, 2015
- GLOBALFOUNDRIES INC.
- Jianwei Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIFORM EXPOSED RAISED STRUCTURES FOR NON-PLANAR SEMICONDUCTOR DEVICES
- Publication number 20150380316
- Publication date Dec 31, 2015
- GLOBALFOUNDRIES INC.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES AND METHODS OF FORMING FINFETS WITH SELF ALIGNED FIN FORMATION
- Publication number 20150333067
- Publication date Nov 19, 2015
- GLOBALFOUNDRIES INC.
- Jing WAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LITHOGRAPHIC STACK EXCLUDING SiARC AND METHOD OF USING SAME
- Publication number 20150332934
- Publication date Nov 19, 2015
- GLOBALFOUNDRIES INC.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION METHODS FACILITATING INTEGRATION OF DIFFERENT DEVICE AR...
- Publication number 20150140756
- Publication date May 21, 2015
- GLOBALFOUNDRIES INC.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MODIFIED, ETCH-RESISTANT GATE STRUCTURE(S) FACILITATING CIRCUIT FAB...
- Publication number 20150140751
- Publication date May 21, 2015
- GLOBALFOUNDRIES INC.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN-TYPE TRANSISTOR STRUCTURES WITH EXTENDED EMBEDDED STRESS ELEMEN...
- Publication number 20150129983
- Publication date May 14, 2015
- GLOBALFOUNDRIES Inc.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES AND METHODS OF FORMING FINFETS WITH SELF ALIGNED FIN FORMATION
- Publication number 20150091094
- Publication date Apr 2, 2015
- GLOBALFOUNDRIES INC.
- Jing WAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING GATE EXPANSION AFTER SOURCE AND DRAIN IMPLANT IN GATE LAST...
- Publication number 20150076622
- Publication date Mar 19, 2015
- Bharat Krishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING FINS WITH RECESS SHAPES
- Publication number 20150017774
- Publication date Jan 15, 2015
- GLOBALFOUNDRIES INC.
- Wei Hua TONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF REVERSE SHALLOW TRENCH ISOLATION STRUCTURES WITH SUP...
- Publication number 20140124794
- Publication date May 8, 2014
- GLOBALFOUNDRIES INC.
- Tong Weihua
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Forming self-aligned NiSi placement with improved performance and y...

Fabrication methods facilitating integration of different device ar...

Methods of removing fins so as to form isolation structures on prod...

Lithographic stack excluding SiARC and method of using same

Multi-layer spacer used in finFET

Uniform exposed raised structures for non-planar semiconductor devices

Multi-phase source/drain/gate spacer-epi formation

Eliminating field oxide loss prior to FinFET source/drain epitaxial...

Devices and methods of forming finFETs with self aligned fin formation

Modified, etch-resistant gate structure(s) facilitating circuit fab...

Reducing gate expansion after source and drain implant in gate last...

Fin-type transistor structures with extended embedded stress elemen...

Uniform gate height for semiconductor structure with N and P type fins

Fabrication of reverse shallow trench isolation structures with sup...

Patents Applicationslast 30 patents

ELIMINATING FIELD OXIDE LOSS PRIOR TO FINFET SOURCE/DRAIN EPITAXIAL...

FORMING SELF-ALIGNED NiSi PLACEMENT WITH IMPROVED PERFORMANCE AND Y...

MULTI-PHASE SOURCE/DRAIN/GATE SPACER-EPI FORMATION

UNIFORM EXPOSED RAISED STRUCTURES FOR NON-PLANAR SEMICONDUCTOR DEVICES

DEVICES AND METHODS OF FORMING FINFETS WITH SELF ALIGNED FIN FORMATION

LITHOGRAPHIC STACK EXCLUDING SiARC AND METHOD OF USING SAME

FABRICATION METHODS FACILITATING INTEGRATION OF DIFFERENT DEVICE AR...

MODIFIED, ETCH-RESISTANT GATE STRUCTURE(S) FACILITATING CIRCUIT FAB...

FIN-TYPE TRANSISTOR STRUCTURES WITH EXTENDED EMBEDDED STRESS ELEMEN...

DEVICES AND METHODS OF FORMING FINFETS WITH SELF ALIGNED FIN FORMATION

REDUCING GATE EXPANSION AFTER SOURCE AND DRAIN IMPLANT IN GATE LAST...

METHOD OF FORMING FINS WITH RECESS SHAPES

FABRICATION OF REVERSE SHALLOW TRENCH ISOLATION STRUCTURES WITH SUP...