Mahesh K. Kumashikar

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Switch based on load current
- Patent number 12,355,359
- Issue date Jul 8, 2025
- Intel Corporation
- MD Altaf Hossain
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Flexible instruction set architecture supporting varying frequencies
- Patent number 12,353,238
- Issue date Jul 8, 2025
- Intel Corporation
- Dheeraj Subbareddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective use of different advanced interface bus with electronic c...
- Patent number 12,334,449
- Issue date Jun 17, 2025
- Altera Corporation
- Dheeraj Subbareddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compressed wallace trees in FMA circuits
- Patent number 12,321,714
- Issue date Jun 3, 2025
- Intel Corporation
- Aditya Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three-dimensional stacked programmable logic fabric and processor d...
- Patent number 12,294,368
- Issue date May 6, 2025
- Intel Corporation
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically scalable timing and power models for programmable logic...
- Patent number 12,273,107
- Issue date Apr 8, 2025
- Altera Corporation
- Atul Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor package with universal optical input/output
- Patent number 12,038,858
- Issue date Jul 16, 2024
- Intel Corporation
- Anshuman Thakur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-latency optical connection for CXL for a server CPU
- Patent number 12,007,929
- Issue date Jun 11, 2024
- Altera Corporation
- Anshuman Thakur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrical and optical interfaces at different heights along an edg...
- Patent number 11,983,135
- Issue date May 14, 2024
- Intel Corporation
- Dheeraj Subbareddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple dies hardware processors and methods
- Patent number 11,899,615
- Issue date Feb 13, 2024
- Intel Corporation
- Nevine Nassif
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance fast Mux-D scan flip-flop
- Patent number 11,757,434
- Issue date Sep 12, 2023
- Intel Corporation
- Amit Agarwal
- G01 - MEASURING TESTING
Information Patent Grant
Low overhead, high bandwidth re-configurable interconnect apparatus...
- Patent number 11,734,174
- Issue date Aug 22, 2023
- Intel Corporation
- Huichu Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple dies hardware processors and methods
- Patent number 11,586,579
- Issue date Feb 21, 2023
- Intel Corporation
- Nevine Nassif
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance fast Mux-D scan flip-flop
- Patent number 11,296,681
- Issue date Apr 5, 2022
- Intel Corporation
- Amit Agarwal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple dies hardware processors and methods
- Patent number 11,294,852
- Issue date Apr 5, 2022
- Intel Corporation
- Nevine Nassif
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple dies hardware processors and methods
- Patent number 10,795,853
- Issue date Oct 6, 2020
- Intel Corporation
- Nevine Nassif
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early wake-warn for clock gating control
- Patent number 9,552,308
- Issue date Jan 24, 2017
- Intel Corporation
- Suresh Sugumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power reduction using unmodified information in evicted cache lines
- Patent number 9,229,879
- Issue date Jan 5, 2016
- Intel Corporation
- Mahesh K. Kumashikar
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS
- Publication number 20240348253
- Publication date Oct 17, 2024
- Atul Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL TRANSFER WITH A BRIDGE AND HYBRID BUMPS
- Publication number 20240346224
- Publication date Oct 17, 2024
- Mahesh K. Kumashikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Transferring Heat From Electronic Devices Using Heat...
- Publication number 20240321670
- Publication date Sep 26, 2024
- Altera Corporation
- Atul Maheshwari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic Devices Having Oval Power Delivery Pads
- Publication number 20240321716
- Publication date Sep 26, 2024
- Altera Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Providing Supply Current To Dies In A System Using A...
- Publication number 20240312905
- Publication date Sep 19, 2024
- Altera Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DISAGGREGATED DIE WITH INPUT/OUTPUT (I/O) TILES
- Publication number 20240232122
- Publication date Jul 11, 2024
- Intel Corporation
- Andrew Paul Collins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI PROGRAMABLE-DIE MODULE
- Publication number 20240145434
- Publication date May 2, 2024
- Intel Corporation
- Mahesh Kumashikar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Arranging Conductive Pads In Electronic Devices
- Publication number 20240120302
- Publication date Apr 11, 2024
- Intel Corporation
- Krishna Bharath Kolluru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Shifting Signal Transmission To Compensate For Defec...
- Publication number 20240113014
- Publication date Apr 4, 2024
- Altera Corporation
- Krishna Bharath Kolluru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Configuring Repeater Circuits In Active Interconnect...
- Publication number 20240111703
- Publication date Apr 4, 2024
- Altera Corporation
- Mahesh Kumashikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems And Methods For Coupling Integrated Circuit Dies
- Publication number 20240096810
- Publication date Mar 21, 2024
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Architecture and Testing for an Integrated Circuit Package
- Publication number 20230341463
- Publication date Oct 26, 2023
- Kalyana Ravindra Kantipudi
- G01 - MEASURING TESTING
Information Patent Application
Circuit Systems And Methods For Transmitting Signals Between Devices
- Publication number 20230342309
- Publication date Oct 26, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems And Methods For Selecting Decoupling Capacitance Using A Po...
- Publication number 20230334212
- Publication date Oct 19, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE DIES HARDWARE PROCESSORS AND METHODS
- Publication number 20230169032
- Publication date Jun 1, 2023
- Intel Corporation
- NEVINE NASSIF
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Die-to-Die Interconnect Architecture for Hardware-Agnostic Modeling
- Publication number 20230042718
- Publication date Feb 9, 2023
- Ankireddy Nalamalpu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Booting A Compute Integrated Circuit Using A Boot Ma...
- Publication number 20230035058
- Publication date Feb 2, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Backside Metallization for FPGA Resources
- Publication number 20230024515
- Publication date Jan 26, 2023
- Atul Maheshwari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE IO ESCAPE ROUTING ON A DISAGGREGATED SHORELINE
- Publication number 20230028475
- Publication date Jan 26, 2023
- Ankireddy Nalamalpu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die-to-Die Power Delivery
- Publication number 20230024662
- Publication date Jan 26, 2023
- Ankireddy Nalamalpu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Programmable Input And Output Interfaces In Processing Integrated C...
- Publication number 20230018793
- Publication date Jan 19, 2023
- Intel Corporation
- Md Altaf Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSED WALLACE TREES IN FMA CIRCUITS
- Publication number 20220365751
- Publication date Nov 17, 2022
- Intel Corporation
- Aditya Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRID-BASED INTERCONNECT SYSTEM FOR MODULAR INTEGRATED CIRCUIT SYSTEMS
- Publication number 20220336415
- Publication date Oct 20, 2022
- Lai Guan Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques For Power Management In Compute Circuits
- Publication number 20220334630
- Publication date Oct 20, 2022
- Intel Corporation
- Sreedhar Ravipalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Three-Dimensional Columnar Input-Output (IO) Circuitry for Integrat...
- Publication number 20220337250
- Publication date Oct 20, 2022
- Mahesh K. Kumashikar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Crossbar Circuits And Methods For External Communication With Logic...
- Publication number 20220334979
- Publication date Oct 20, 2022
- Intel Corporation
- Sreedhar Ravipalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Sharing Memory Interface Circuits Between Integrated...
- Publication number 20220334983
- Publication date Oct 20, 2022
- Intel Corporation
- Mahesh Kumashikar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR MODULAR DISAGGREGATED INTEGRATED CIRCUIT SY...
- Publication number 20220337251
- Publication date Oct 20, 2022
- Ankireddy Nalamalpu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Shared Non-Blocking Crossbar Buffer Circuits And Methods
- Publication number 20220326676
- Publication date Oct 13, 2022
- Intel Corporation
- Sreedhar Ravipalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DYNAMIC POWER AND THERMAL MANAGEMENT FOR PR...
- Publication number 20220294455
- Publication date Sep 15, 2022
- Intel Corporation
- Mahesh K. Kumashikar
- G06 - COMPUTING CALCULATING COUNTING

Mahesh K. Kumashikar

Person

Patents Grantslast 30 patents

Switch based on load current

Flexible instruction set architecture supporting varying frequencies

Selective use of different advanced interface bus with electronic c...

Compressed wallace trees in FMA circuits

Three-dimensional stacked programmable logic fabric and processor d...

Dynamically scalable timing and power models for programmable logic...

Processor package with universal optical input/output

Low-latency optical connection for CXL for a server CPU

Electrical and optical interfaces at different heights along an edg...

Multiple dies hardware processors and methods

High performance fast Mux-D scan flip-flop

Low overhead, high bandwidth re-configurable interconnect apparatus...

Multiple dies hardware processors and methods

High performance fast Mux-D scan flip-flop

Multiple dies hardware processors and methods

Multiple dies hardware processors and methods

Early wake-warn for clock gating control

Power reduction using unmodified information in evicted cache lines

Patents Applicationslast 30 patents

MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS

SIGNAL TRANSFER WITH A BRIDGE AND HYBRID BUMPS

Techniques For Transferring Heat From Electronic Devices Using Heat...

Electronic Devices Having Oval Power Delivery Pads

Techniques For Providing Supply Current To Dies In A System Using A...

DISAGGREGATED DIE WITH INPUT/OUTPUT (I/O) TILES

MULTI PROGRAMABLE-DIE MODULE

Techniques For Arranging Conductive Pads In Electronic Devices

Techniques For Shifting Signal Transmission To Compensate For Defec...

Techniques For Configuring Repeater Circuits In Active Interconnect...

Systems And Methods For Coupling Integrated Circuit Dies

Architecture and Testing for an Integrated Circuit Package

Circuit Systems And Methods For Transmitting Signals Between Devices

Systems And Methods For Selecting Decoupling Capacitance Using A Po...

MULTIPLE DIES HARDWARE PROCESSORS AND METHODS

Die-to-Die Interconnect Architecture for Hardware-Agnostic Modeling

Techniques For Booting A Compute Integrated Circuit Using A Boot Ma...

Backside Metallization for FPGA Resources

PACKAGE IO ESCAPE ROUTING ON A DISAGGREGATED SHORELINE

Die-to-Die Power Delivery

Programmable Input And Output Interfaces In Processing Integrated C...

COMPRESSED WALLACE TREES IN FMA CIRCUITS

GRID-BASED INTERCONNECT SYSTEM FOR MODULAR INTEGRATED CIRCUIT SYSTEMS

Techniques For Power Management In Compute Circuits

Three-Dimensional Columnar Input-Output (IO) Circuitry for Integrat...

Crossbar Circuits And Methods For External Communication With Logic...

Techniques For Sharing Memory Interface Circuits Between Integrated...

SYSTEMS AND METHODS FOR MODULAR DISAGGREGATED INTEGRATED CIRCUIT SY...

Shared Non-Blocking Crossbar Buffer Circuits And Methods

SYSTEMS AND METHODS FOR DYNAMIC POWER AND THERMAL MANAGEMENT FOR PR...