Mahesh K. Reddy

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Prediction confirmation for cache subsystem
- Patent number 11,880,308
- Issue date Jan 23, 2024
- Apple Inc.
- Ronald P. Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Poison mechanisms for deferred invalidates
- Patent number 11,630,771
- Issue date Apr 18, 2023
- Apple Inc.
- John D Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prediction confirmation for cache subsystem
- Patent number 11,487,667
- Issue date Nov 1, 2022
- Apple Inc.
- Ronald P. Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Age tracking for independent pipelines
- Patent number 11,422,821
- Issue date Aug 23, 2022
- Apple Inc.
- James N. Hardage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling non-cacheable loads in a non-coherent processor
- Patent number 10,747,535
- Issue date Aug 18, 2020
- Apple Inc.
- Mahesh K. Reddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-shifting reservation station
- Patent number 10,678,542
- Issue date Jun 9, 2020
- Apple Inc.
- Ian D. Kountanis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accessing memories in coherent and non-coherent domains in a comput...
- Patent number 10,402,326
- Issue date Sep 3, 2019
- Apple Inc.
- Ronald P. Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface logic for a multi-core system-on-a-chip (SoC)
- Patent number 9,189,439
- Issue date Nov 17, 2015
- Intel Corporation
- Ramana Rachakonda
- G01 - MEASURING TESTING
Information Patent Grant
Interface logic for a multi-core system-on-a-chip (SoC)
- Patent number 8,650,629
- Issue date Feb 11, 2014
- Intel Corporation
- Ramana Rachakonda
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Prediction Confirmation for Cache Subsystem
- Publication number 20240176744
- Publication date May 30, 2024
- Apple Inc.
- Ronald P. Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Prediction Confirmation for Cache Subsystem
- Publication number 20230084736
- Publication date Mar 16, 2023
- Apple Inc.
- Ronald P. Hall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Poison Mechanisms for Deferred Invalidates
- Publication number 20230017473
- Publication date Jan 19, 2023
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-SHIFTING RESERVATION STATION
- Publication number 20170024205
- Publication date Jan 26, 2017
- Apple Inc.
- Ian D. Kountanis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE LOGIC FOR A MULTI-CORE SYSTEM-ON-A-CHIP (SOC)
- Publication number 20140108695
- Publication date Apr 17, 2014
- Ramana Rachakonda
- G01 - MEASURING TESTING
Information Patent Application
Interface Logic For A Multi-Core System-On-A-Chip (SoC)
- Publication number 20110145909
- Publication date Jun 16, 2011
- Ramana Rachakonda
- G06 - COMPUTING CALCULATING COUNTING

Mahesh K. Reddy

Person

Patents Grantslast 30 patents

Prediction confirmation for cache subsystem

Poison mechanisms for deferred invalidates

Prediction confirmation for cache subsystem

Age tracking for independent pipelines

Handling non-cacheable loads in a non-coherent processor

Non-shifting reservation station

Accessing memories in coherent and non-coherent domains in a comput...

Interface logic for a multi-core system-on-a-chip (SoC)

Interface logic for a multi-core system-on-a-chip (SoC)

Patents Applicationslast 30 patents

Prediction Confirmation for Cache Subsystem

Prediction Confirmation for Cache Subsystem

Poison Mechanisms for Deferred Invalidates

NON-SHIFTING RESERVATION STATION

INTERFACE LOGIC FOR A MULTI-CORE SYSTEM-ON-A-CHIP (SOC)

Interface Logic For A Multi-Core System-On-A-Chip (SoC)