Mahmut Sinangil

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Compute in memory system
- Patent number 12,073,869
- Issue date Aug 27, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical interconnect structures with integrated circuits
- Patent number 12,068,284
- Issue date Aug 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Tzu-Hsien Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-charging bit lines through charge-sharing
- Patent number 11,848,047
- Issue date Dec 19, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Series of parallel sensing operations for multi-level cells
- Patent number 11,735,235
- Issue date Aug 22, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Qing Dong
- G11 - INFORMATION STORAGE
Information Patent Grant
Compute in memory system
- Patent number 11,322,195
- Issue date May 3, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Series of parallel sensing operations for multi-level cells
- Patent number 11,238,906
- Issue date Feb 1, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Qing Dong
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage bit-cell
- Patent number 11,200,946
- Issue date Dec 14, 2021
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM cell for interleaved wordline scheme
- Patent number 10,971,217
- Issue date Apr 6, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line logic circuits and methods
- Patent number 10,867,646
- Issue date Dec 15, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shang-Chi Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read stability enhancement with short segmented bit line arc...
- Patent number 10,854,282
- Issue date Dec 1, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-charging bit lines through charge-sharing
- Patent number 10,847,217
- Issue date Nov 24, 2020
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage bit-cell
- Patent number 10,847,214
- Issue date Nov 24, 2020
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM cell for interleaved wordline scheme
- Patent number 10,770,131
- Issue date Sep 8, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read stability enhancement with short segmented bit line arc...
- Patent number 10,510,403
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-charging bit lines through charge-sharing
- Patent number 10,410,715
- Issue date Sep 10, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM cell for interleaved wordline scheme
- Patent number 10,276,231
- Issue date Apr 30, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read stability enhancement with short segmented bit line arc...
- Patent number 10,153,038
- Issue date Dec 11, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-charging bit lines through charge-sharing
- Patent number 9,922,701
- Issue date Mar 20, 2018
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory read stability enhancement with short segmented bit line arc...
- Patent number 9,922,700
- Issue date Mar 20, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM cell for interleaved wordline scheme
- Patent number 9,886,996
- Issue date Feb 6, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Level shifter circuit using boosting circuit
- Patent number 9,762,216
- Issue date Sep 12, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- Mahmut Sinangil
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
COMPUTE IN MEMORY SYSTEM
- Publication number 20240379149
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL INTERCONNECT STRUCTURES WITH INTEGRATED CIRCUITS
- Publication number 20240363594
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzu-Hsien Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pre-Charging Bit Lines Through Charge-Sharing
- Publication number 20240079053
- Publication date Mar 7, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
SERIES OF PARALLEL SENSING OPERATIONS FOR MULTI-LEVEL CELLS
- Publication number 20230377614
- Publication date Nov 23, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Qing Dong
- G11 - INFORMATION STORAGE
Information Patent Application
BOOTH MULTIPLIER FOR COMPUTE-IN-MEMORY
- Publication number 20230376273
- Publication date Nov 23, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Rawan Naous
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE-IN-MEMORY CELL
- Publication number 20230315389
- Publication date Oct 5, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BACK SIDE POWER SUPPLY INTERCONNECT ROUTING
- Publication number 20230290840
- Publication date Sep 14, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Nail Etkin Can AKKAYA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICES WITH BACKSIDE BOOST CAPACITOR AND METHODS FOR FORMIN...
- Publication number 20230274769
- Publication date Aug 31, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Nail Etkin Can Akkaya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Compute-In-Memory-Based Floating-Point Processor
- Publication number 20230133360
- Publication date May 4, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Rawan Naous
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERTICAL INTERCONNECT STRUCTURES WITH INTEGRATED CIRCUITS
- Publication number 20220302088
- Publication date Sep 22, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tzu-Hsien Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPUTE IN MEMORY SYSTEM
- Publication number 20220262424
- Publication date Aug 18, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
SERIES OF PARALLEL SENSING OPERATIONS FOR MULTI-LEVEL CELLS
- Publication number 20220130435
- Publication date Apr 28, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Qing Dong
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTE IN MEMORY SYSTEM
- Publication number 20210158854
- Publication date May 27, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Mahmut Sinangil
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low Voltage Bit-Cell
- Publication number 20210050053
- Publication date Feb 18, 2021
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
Pre-Charging Bit Lines Through Charge-Sharing
- Publication number 20200402572
- Publication date Dec 24, 2020
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM CELL FOR INTERLEAVED WORDLINE SCHEME
- Publication number 20200372951
- Publication date Nov 26, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Hidehiro Fujiwara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...
- Publication number 20200075092
- Publication date Mar 5, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
Pre-Charging Bit Lines Through Charge-Sharing
- Publication number 20190348110
- Publication date Nov 14, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT BIT LINE LOGIC CIRCUIT AND METHOD
- Publication number 20190304520
- Publication date Oct 3, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shang-Chi WU
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM CELL FOR INTERLEAVED WORDLINE SCHEME
- Publication number 20190237134
- Publication date Aug 1, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Hidehiro Fujiwara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...
- Publication number 20190108874
- Publication date Apr 11, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
Low Voltage Bit-Cell
- Publication number 20190096476
- Publication date Mar 28, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Yen-Huei Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...
- Publication number 20180197601
- Publication date Jul 12, 2018
- Taiwan Semiconductor Manufacturing Co., LTD
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
Pre-Charging Bit Lines Through Charge-Sharing
- Publication number 20180174649
- Publication date Jun 21, 2018
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM CELL FOR INTERLEAVED WORDLINE SCHEME
- Publication number 20180158510
- Publication date Jun 7, 2018
- Taiwan Semiconductor Manufacturing Co., LTD
- Hidehiro Fujiwara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRE-CHARGING BIT LINES THROUGH CHARGE-SHARING
- Publication number 20180040366
- Publication date Feb 8, 2018
- Taiwan Semiconductor Manufacturing Company Limited
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...
- Publication number 20170345485
- Publication date Nov 30, 2017
- Taiwan Semiconductor Manufacturing Co., LTD
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Application
LEVEL SHIFTER CIRCUIT USING BOOSTING CIRCUIT
- Publication number 20170264276
- Publication date Sep 14, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Mahmut Sinangil
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SRAM CELL FOR INTERLEAVED WORDLINE SCHEME
- Publication number 20170110181
- Publication date Apr 20, 2017
- Taiwan Semiconductor Manufacturing Co., LTD
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE

Mahmut Sinangil

Person

Patents Grantslast 30 patents

Compute in memory system

Vertical interconnect structures with integrated circuits

Pre-charging bit lines through charge-sharing

Series of parallel sensing operations for multi-level cells

Compute in memory system

Series of parallel sensing operations for multi-level cells

Low voltage bit-cell

SRAM cell for interleaved wordline scheme

Bit line logic circuits and methods

Memory read stability enhancement with short segmented bit line arc...

Pre-charging bit lines through charge-sharing

Low voltage bit-cell

SRAM cell for interleaved wordline scheme

Memory read stability enhancement with short segmented bit line arc...

Pre-charging bit lines through charge-sharing

SRAM cell for interleaved wordline scheme

Memory read stability enhancement with short segmented bit line arc...

Pre-charging bit lines through charge-sharing

Memory read stability enhancement with short segmented bit line arc...

SRAM cell for interleaved wordline scheme

Level shifter circuit using boosting circuit

Patents Applicationslast 30 patents

COMPUTE IN MEMORY SYSTEM

VERTICAL INTERCONNECT STRUCTURES WITH INTEGRATED CIRCUITS

Pre-Charging Bit Lines Through Charge-Sharing

SERIES OF PARALLEL SENSING OPERATIONS FOR MULTI-LEVEL CELLS

BOOTH MULTIPLIER FOR COMPUTE-IN-MEMORY

COMPUTE-IN-MEMORY CELL

BACK SIDE POWER SUPPLY INTERCONNECT ROUTING

MEMORY DEVICES WITH BACKSIDE BOOST CAPACITOR AND METHODS FOR FORMIN...

Compute-In-Memory-Based Floating-Point Processor

VERTICAL INTERCONNECT STRUCTURES WITH INTEGRATED CIRCUITS

COMPUTE IN MEMORY SYSTEM

SERIES OF PARALLEL SENSING OPERATIONS FOR MULTI-LEVEL CELLS

COMPUTE IN MEMORY SYSTEM

Low Voltage Bit-Cell

Pre-Charging Bit Lines Through Charge-Sharing

SRAM CELL FOR INTERLEAVED WORDLINE SCHEME

MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...

Pre-Charging Bit Lines Through Charge-Sharing

MEMORY CIRCUIT BIT LINE LOGIC CIRCUIT AND METHOD

SRAM CELL FOR INTERLEAVED WORDLINE SCHEME

MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...

Low Voltage Bit-Cell

MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...

Pre-Charging Bit Lines Through Charge-Sharing

SRAM CELL FOR INTERLEAVED WORDLINE SCHEME

PRE-CHARGING BIT LINES THROUGH CHARGE-SHARING

MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARC...

LEVEL SHIFTER CIRCUIT USING BOOSTING CIRCUIT

SRAM CELL FOR INTERLEAVED WORDLINE SCHEME