Mahmut Yilmaz

Person

Los Altos Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Test data authentication and processing using scalable data structures
- Patent number 12,277,043
- Issue date Apr 15, 2025
- NVIDIA Corporation
- Smbat Tonoyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible one-hot decoding logic for clock controls
- Patent number 11,940,493
- Issue date Mar 26, 2024
- NVIDIA Corp.
- Mahmut Yilmaz
- G01 - MEASURING TESTING
Information Patent Grant
Controlling test networks of chips using integrated processors
- Patent number 11,526,644
- Issue date Dec 13, 2022
- NVIDIA Corporation
- Kaushik Narayanun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic independent test partition clock
- Patent number 10,473,720
- Issue date Nov 12, 2019
- NVIDIA Corporation
- Pavan Kumar Datla Jagannadha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for dynamic standard test access (DSTA) for a log...
- Patent number 10,451,676
- Issue date Oct 22, 2019
- NVIDIA Corporation
- Milind Sonawane
- G01 - MEASURING TESTING
Information Patent Grant
Independent test partition clock coordination across multiple test...
- Patent number 10,444,280
- Issue date Oct 15, 2019
- NVIDIA Corporation
- Dheepakkumaran Jayaraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test partition external input/output interface control for test par...
- Patent number 10,281,524
- Issue date May 7, 2019
- NVIDIA Corporation
- Sailendra Chadalavda
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TEST DATA AUTHENTICATION AND PROCESSING USING SCALABLE DATA STRUCTURES
- Publication number 20250217251
- Publication date Jul 3, 2025
- NVIDIA Corporation
- Smbat Tonoyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS
- Publication number 20240094291
- Publication date Mar 21, 2024
- NVIDIA Corp.
- Mahmut Yilmaz
- G01 - MEASURING TESTING
Information Patent Application
TEST DATA AUTHENTICATION AND PROCESSING USING SCALABLE DATA STRUCTURES
- Publication number 20230409452
- Publication date Dec 21, 2023
- NVIDIA Corporation
- Smbat Tonoyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR ENABLING ON-DIE NOISE MEASUREMENT DURING ATE TESTING...
- Publication number 20230146920
- Publication date May 11, 2023
- NVIDIA Corporation
- Bonita Bhaskaran
- G01 - MEASURING TESTING
Information Patent Application
CONTROLLING TEST NETWORKS OF CHIPS USING INTEGRATED PROCESSORS
- Publication number 20220138387
- Publication date May 5, 2022
- NVIDIA Corporation
- Kaushik Narayanun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST PARTITION EXTERNAL INPUT/OUTPUT INTERFACE CONTROL
- Publication number 20170115338
- Publication date Apr 27, 2017
- Sailendra Chadalavda
- G01 - MEASURING TESTING
Information Patent Application
DYNAMIC INDEPENDENT TEST PARTITION CLOCK
- Publication number 20170115351
- Publication date Apr 27, 2017
- NVIDIA Corporation
- Pavan Kumar Datla Jagannadha
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR DYNAMIC STANDARD TEST ACCESS (DSTA) FOR A LOG...
- Publication number 20170115345
- Publication date Apr 27, 2017
- NVIDIA Corporation
- Milind Sonawane
- G01 - MEASURING TESTING
Information Patent Application
INDEPENDENT TEST PARTITION CLOCK COORDINATION ACROSS MULTIPLE TEST...
- Publication number 20170115352
- Publication date Apr 27, 2017
- NVIDIA Corporation
- Dheepakkumaran Jayaraman
- G01 - MEASURING TESTING

Mahmut Yilmaz

Person

Patents Grantslast 30 patents

Test data authentication and processing using scalable data structures

Flexible one-hot decoding logic for clock controls

Controlling test networks of chips using integrated processors

Dynamic independent test partition clock

Method and system for dynamic standard test access (DSTA) for a log...

Independent test partition clock coordination across multiple test...

Test partition external input/output interface control for test par...

Patents Applicationslast 30 patents

TEST DATA AUTHENTICATION AND PROCESSING USING SCALABLE DATA STRUCTURES

FLEXIBLE ONE-HOT DECODING LOGIC FOR CLOCK CONTROLS

TEST DATA AUTHENTICATION AND PROCESSING USING SCALABLE DATA STRUCTURES

TECHNIQUE FOR ENABLING ON-DIE NOISE MEASUREMENT DURING ATE TESTING...

CONTROLLING TEST NETWORKS OF CHIPS USING INTEGRATED PROCESSORS

TEST PARTITION EXTERNAL INPUT/OUTPUT INTERFACE CONTROL

DYNAMIC INDEPENDENT TEST PARTITION CLOCK

METHOD AND SYSTEM FOR DYNAMIC STANDARD TEST ACCESS (DSTA) FOR A LOG...

INDEPENDENT TEST PARTITION CLOCK COORDINATION ACROSS MULTIPLE TEST...