Man Mui

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Linked XOR flash data protection scheme
- Patent number 11,935,609
- Issue date Mar 19, 2024
- Western Digital Technologies, Inc.
- Oleg Kragel
- G11 - INFORMATION STORAGE
Information Patent Grant
SSD operation in a nonoptimal memory environment
- Patent number 11,334,251
- Issue date May 17, 2022
- Western Digital Technologies, Inc.
- Dmitry Vaysman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage generator to compensate for process corner and temperature...
- Patent number 9,959,915
- Issue date May 1, 2018
- SanDisk Technologies LLC
- Amul Desai
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming techniques for non-volatile memories with charge trappi...
- Patent number 9,947,395
- Issue date Apr 17, 2018
- SanDisk Technologies LLC
- Kenneth Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for programming of select gates in NAND memory
- Patent number 9,947,407
- Issue date Apr 17, 2018
- SanDisk Technologies LLC
- Hao Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for programming of select gates in NAND memory
- Patent number 9,659,656
- Issue date May 23, 2017
- SanDisk Technologies LLC
- Hao Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Segmentation of blocks for faster bit line settling/recovery in non...
- Patent number 9,633,742
- Issue date Apr 25, 2017
- SanDisk Technologies LLC
- Amul Dhirajbhai Desai
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming techniques for non-volatile memories with charge trappi...
- Patent number 9,627,046
- Issue date Apr 18, 2017
- SanDisk Technologies LLC
- Kenneth Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Utilizing NAND strings in dummy blocks for faster bit line precharge
- Patent number 9,595,338
- Issue date Mar 14, 2017
- SanDisk Technologies LLC
- Juan Carlos Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive selective bit line pre-charge for current savings and fast...
- Patent number 9,595,345
- Issue date Mar 14, 2017
- SanDisk Technologies LLC
- Man L Mui
- G11 - INFORMATION STORAGE
Information Patent Grant
Compact high speed sense amplifier for non-volatile memory with red...
- Patent number 9,558,836
- Issue date Jan 31, 2017
- SanDisk Technologies LLC
- Man Lung Mui
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier with efficient use of data latches
- Patent number 9,552,882
- Issue date Jan 24, 2017
- SanDisk Technologies LLC
- Tai-Yuan Tseng
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi tier three-dimensional memory devices including vertically sh...
- Patent number 9,502,471
- Issue date Nov 22, 2016
- SanDisk Technologies LLC
- Zhenyu Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compensation for sub-block erase
- Patent number 9,466,382
- Issue date Oct 11, 2016
- SanDisk Technologies LLC
- Chris Nga Yee Avila
- G11 - INFORMATION STORAGE
Information Patent Grant
Balancing programming speeds of memory cells in a 3D stacked memory
- Patent number 9,343,156
- Issue date May 17, 2016
- SanDisk Technologies Inc.
- Man L Mui
- G11 - INFORMATION STORAGE
Information Patent Grant
Detecting programmed word lines based on NAND string current
- Patent number 9,330,779
- Issue date May 3, 2016
- SanDisk Technologies Inc.
- Man L Mui
- G11 - INFORMATION STORAGE
Information Patent Grant
Group word line erase and erase-verify methods for 3D non-volatile...
- Patent number 9,330,778
- Issue date May 3, 2016
- SanDisk Technologies Inc.
- Xiying Costa
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory and method with adjusted timing for individual...
- Patent number 9,318,204
- Issue date Apr 19, 2016
- SanDisk Technologies, Inc
- Han Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Word line kick during sensing: trimming and adjacent word lines
- Patent number 9,318,210
- Issue date Apr 19, 2016
- SanDisk Technologies Inc.
- James V. Hart
- G11 - INFORMATION STORAGE
Information Patent Grant
Zoned erase verify in three dimensional nonvolatile memory
- Patent number 9,312,026
- Issue date Apr 12, 2016
- SanDisk Technologies Inc.
- Mrinal Kochar
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for programming of select gates in NAND memory
- Patent number 9,305,648
- Issue date Apr 5, 2016
- SanDisk Technologies, Inc
- Hao Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Compact high speed sense amplifier for non-volatile memory
- Patent number 9,293,195
- Issue date Mar 22, 2016
- SanDisk Technologies Inc.
- Man Lung Mui
- G11 - INFORMATION STORAGE
Information Patent Grant
Pseudo block operation mode in 3D NAND
- Patent number 9,240,241
- Issue date Jan 19, 2016
- SanDisk Technologies Inc.
- Xiying Costa
- G11 - INFORMATION STORAGE
Information Patent Grant
Back gate operation with elevated threshold voltage
- Patent number 9,240,238
- Issue date Jan 19, 2016
- SanDisk Technologies Inc.
- Deepak Raghu
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage kick to non-selected word line during programming
- Patent number 9,236,128
- Issue date Jan 12, 2016
- SanDisk Technologies Inc.
- Kenneth Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimized configurable NAND parameters
- Patent number 9,229,856
- Issue date Jan 5, 2016
- SanDisk Technologies Inc.
- Chris Avila
- G11 - INFORMATION STORAGE
Information Patent Grant
System for maintaining back gate threshold voltage in three dimensi...
- Patent number 9,230,656
- Issue date Jan 5, 2016
- SanDisk Technologies Inc.
- Chris Nga Yee Avila
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive operation of three dimensional memory
- Patent number 9,218,890
- Issue date Dec 22, 2015
- SanDisk Technologies Inc.
- Chris Nga Yee Avila
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-pulse programming cycle of non-volatile memory for enhanced d...
- Patent number 9,218,874
- Issue date Dec 22, 2015
- SanDisk Technologies Inc.
- Yee Lih Koh
- G11 - INFORMATION STORAGE
Information Patent Grant
Compensation for temperature dependence of bit line resistance
- Patent number 9,202,579
- Issue date Dec 1, 2015
- SanDisk Technologies Inc.
- Chia-Lin Hsiung
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Linked XOR Flash Data Protection Scheme
- Publication number 20230368857
- Publication date Nov 16, 2023
- Western Digital Technologies, Inc.
- Oleg Kragel
- G11 - INFORMATION STORAGE
Information Patent Application
SSD Operation in a Nonoptimal Memory Environment
- Publication number 20210141539
- Publication date May 13, 2021
- Western Digital Technologies, Inc.
- Dmitry VAYSMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Programming Of Select Gates In NAND Memory
- Publication number 20170256317
- Publication date Sep 7, 2017
- SanDisk Technologies LLC
- Hao Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
Programming Techniques for Non-Volatile Memories with Charge Trappi...
- Publication number 20170221556
- Publication date Aug 3, 2017
- SanDisk Technologies LLC
- Kenneth Louie
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE GENERATOR TO COMPENSATE FOR PROCESS CORNER AND TEMPERATURE...
- Publication number 20170169867
- Publication date Jun 15, 2017
- SanDisk Technologies, LLC.
- Amul DESAI
- G11 - INFORMATION STORAGE
Information Patent Application
Programming Techniques for Non-Volatile Memories with Charge Trappi...
- Publication number 20160260476
- Publication date Sep 8, 2016
- SanDisk Technologies, Inc.
- Kenneth Louie
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PROGRAMMING OF SELECT GATES IN NAND MEMORY
- Publication number 20160189778
- Publication date Jun 30, 2016
- SanDisk Technologies, Inc.
- Hao NGUYEN
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY AND METHOD WITH ADJUSTED TIMING FOR INDIVIDUAL...
- Publication number 20160099059
- Publication date Apr 7, 2016
- SanDisk Technologies, Inc.
- Han Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Utilizing NAND Strings in Dummy Blocks for Faster Bit Line Precharge
- Publication number 20160086671
- Publication date Mar 24, 2016
- SANDISK TECHNOLOGIES INC.
- Juan Carlos Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Techniques for Programming of Select Gates in NAND Memory
- Publication number 20160055911
- Publication date Feb 25, 2016
- SANDISK TECHNOLOGIES INC.
- Hao Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
Zoned Erase Verify in Three Dimensional Nonvolatile Memory
- Publication number 20160055918
- Publication date Feb 25, 2016
- SANDISK TECHNOLOGIES INC.
- Mrinal Kochar
- G11 - INFORMATION STORAGE
Information Patent Application
Adaptive Selective Bit Line Pre-Charge For Current Savings And Fast...
- Publication number 20160042802
- Publication date Feb 11, 2016
- Man L. Mui
- G11 - INFORMATION STORAGE
Information Patent Application
Compact High Speed Sense Amplifier for Non-Volatile Memory with Red...
- Publication number 20160035430
- Publication date Feb 4, 2016
- SanDisk Technologies, Inc.
- Man Lung Mui
- G11 - INFORMATION STORAGE
Information Patent Application
Segmentation of Blocks for Faster Bit Line Settling/Recovery in Non...
- Publication number 20160012903
- Publication date Jan 14, 2016
- SANDISK TECHNOLOGIES INC.
- Amul Dhirajbhai Desai
- G11 - INFORMATION STORAGE
Information Patent Application
Sense Amplifier With Efficient Use Of Data Latches
- Publication number 20150221348
- Publication date Aug 6, 2015
- SANDISK TECHNOLOGIES INC.
- Tai-Yuan Tseng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Erase Operation For 3D Non-Volatile Memory With Controllable Gate-I...
- Publication number 20150170748
- Publication date Jun 18, 2015
- SANDISK TECHNOLOGIES INC.
- Xiying Costa
- G11 - INFORMATION STORAGE
Information Patent Application
FAST-READING NAND FLASH MEMORY
- Publication number 20150170752
- Publication date Jun 18, 2015
- SANDISK TECHNOLOGIES INC.
- Yacov Duzly
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Partial Page Programming of Multi Level Cells
- Publication number 20150162086
- Publication date Jun 11, 2015
- SANDISK TECHNOLOGIES INC.
- Gautam A. Dusija
- G11 - INFORMATION STORAGE
Information Patent Application
Detecting Programmed Word Lines Based On NAND String Current
- Publication number 20150124527
- Publication date May 7, 2015
- SANDISK TECHNOLOGIES INC.
- Man L. Mui
- G11 - INFORMATION STORAGE
Information Patent Application
Block Structure Profiling in Three Dimensional Memory
- Publication number 20150121156
- Publication date Apr 30, 2015
- SANDISK TECHNOLOGIES INC.
- Deepak Raghu
- G11 - INFORMATION STORAGE
Information Patent Application
Selection of Data for Redundancy Calculation By Likely Error Rate
- Publication number 20150121157
- Publication date Apr 30, 2015
- SANDISK TECHNOLOGIES INC.
- Deepak Raghu
- G11 - INFORMATION STORAGE
Information Patent Application
Selection of Data for Redundancy Calculation By Likely Error Rate
- Publication number 20150117099
- Publication date Apr 30, 2015
- SANDISK TECHNOLOGIES INC.
- Deepak Raghu
- G11 - INFORMATION STORAGE
Information Patent Application
Pseudo Block Operation Mode In 3D NAND
- Publication number 20150092493
- Publication date Apr 2, 2015
- SANDISK TECHNOLOGIES INC.
- Xiying Costa
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic Bit Line Bias For Programming Non-Volatile Memory
- Publication number 20150092496
- Publication date Apr 2, 2015
- SANDISK TECHNOLOGIES INC.
- Deepanshu Dutta
- G11 - INFORMATION STORAGE
Information Patent Application
Back Gate Operation with Elevated Threshold Voltage
- Publication number 20150085574
- Publication date Mar 26, 2015
- SanDisk Technology Inc.
- Deepak Raghu
- G11 - INFORMATION STORAGE
Information Patent Application
Bad Block Reconfiguration in Nonvolatile Memory
- Publication number 20150067419
- Publication date Mar 5, 2015
- SANDISK TECHNOLOGIES INC.
- Deepak Raghu
- G11 - INFORMATION STORAGE
Information Patent Application
Bad Block Reconfiguration in Nonvolatile Memory
- Publication number 20150063028
- Publication date Mar 5, 2015
- SANDISK TECHNOLOGIES INC.
- Deepak Raghu
- G11 - INFORMATION STORAGE
Information Patent Application
Group Word Line Erase And Erase-Verify Methods For 3D Non-Volatile...
- Publication number 20150043278
- Publication date Feb 12, 2015
- SANDISK TECHNOLOGIES INC.
- Xiying Costa
- G11 - INFORMATION STORAGE
Information Patent Application
System for Maintaining Back Gate Threshold Voltage in Three Dimensi...
- Publication number 20150003161
- Publication date Jan 1, 2015
- SANDISK TECHNOLOGIES INC.
- Chris Nga Yee Avila
- G11 - INFORMATION STORAGE
Information Patent Application
Detecting Programmed Word Lines Based On NAND String Current
- Publication number 20150003162
- Publication date Jan 1, 2015
- SANDISK TECHNOLOGIES INC.
- Man L. Mui
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Linked XOR flash data protection scheme

SSD operation in a nonoptimal memory environment

Voltage generator to compensate for process corner and temperature...

Programming techniques for non-volatile memories with charge trappi...

Techniques for programming of select gates in NAND memory

Techniques for programming of select gates in NAND memory

Segmentation of blocks for faster bit line settling/recovery in non...

Programming techniques for non-volatile memories with charge trappi...

Utilizing NAND strings in dummy blocks for faster bit line precharge

Adaptive selective bit line pre-charge for current savings and fast...

Compact high speed sense amplifier for non-volatile memory with red...

Sense amplifier with efficient use of data latches

Multi tier three-dimensional memory devices including vertically sh...

Compensation for sub-block erase

Balancing programming speeds of memory cells in a 3D stacked memory

Detecting programmed word lines based on NAND string current

Group word line erase and erase-verify methods for 3D non-volatile...

Non-volatile memory and method with adjusted timing for individual...

Word line kick during sensing: trimming and adjacent word lines

Zoned erase verify in three dimensional nonvolatile memory

Techniques for programming of select gates in NAND memory

Compact high speed sense amplifier for non-volatile memory

Pseudo block operation mode in 3D NAND

Back gate operation with elevated threshold voltage

Voltage kick to non-selected word line during programming

Optimized configurable NAND parameters

System for maintaining back gate threshold voltage in three dimensi...

Adaptive operation of three dimensional memory

Multi-pulse programming cycle of non-volatile memory for enhanced d...

Compensation for temperature dependence of bit line resistance

Patents Applicationslast 30 patents

Linked XOR Flash Data Protection Scheme

SSD Operation in a Nonoptimal Memory Environment

Techniques For Programming Of Select Gates In NAND Memory

Programming Techniques for Non-Volatile Memories with Charge Trappi...

VOLTAGE GENERATOR TO COMPENSATE FOR PROCESS CORNER AND TEMPERATURE...

Programming Techniques for Non-Volatile Memories with Charge Trappi...

TECHNIQUES FOR PROGRAMMING OF SELECT GATES IN NAND MEMORY

NON-VOLATILE MEMORY AND METHOD WITH ADJUSTED TIMING FOR INDIVIDUAL...

Utilizing NAND Strings in Dummy Blocks for Faster Bit Line Precharge

Techniques for Programming of Select Gates in NAND Memory

Zoned Erase Verify in Three Dimensional Nonvolatile Memory

Adaptive Selective Bit Line Pre-Charge For Current Savings And Fast...

Compact High Speed Sense Amplifier for Non-Volatile Memory with Red...

Segmentation of Blocks for Faster Bit Line Settling/Recovery in Non...

Sense Amplifier With Efficient Use Of Data Latches

Erase Operation For 3D Non-Volatile Memory With Controllable Gate-I...

FAST-READING NAND FLASH MEMORY

Systems and Methods for Partial Page Programming of Multi Level Cells

Detecting Programmed Word Lines Based On NAND String Current

Block Structure Profiling in Three Dimensional Memory

Selection of Data for Redundancy Calculation By Likely Error Rate

Selection of Data for Redundancy Calculation By Likely Error Rate

Pseudo Block Operation Mode In 3D NAND

Dynamic Bit Line Bias For Programming Non-Volatile Memory

Back Gate Operation with Elevated Threshold Voltage

Bad Block Reconfiguration in Nonvolatile Memory

Bad Block Reconfiguration in Nonvolatile Memory

Group Word Line Erase And Erase-Verify Methods For 3D Non-Volatile...

System for Maintaining Back Gate Threshold Voltage in Three Dimensi...

Detecting Programmed Word Lines Based On NAND String Current