Maniam Alagaratnam

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for establishing improved thermal communicatio...
- Patent number 7,119,432
- Issue date Oct 10, 2006
- LSI Logic Corporation
- Kishor V. Desai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi chip module assembly
- Patent number 7,041,516
- Issue date May 9, 2006
- LSI Logic Corporation
- Sarathy Rajagopalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming electrolytic contact pads including layers of cop...
- Patent number 6,777,314
- Issue date Aug 17, 2004
- LSI Logic Corporation
- Kishor Desai
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Interposer for semiconductor package assembly
- Patent number 6,618,938
- Issue date Sep 16, 2003
- LSI Logic Corporation
- Maniam Alagaratnam
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit package substrate with high density routing mech...
- Patent number 6,608,376
- Issue date Aug 19, 2003
- LSI Logic Corporation
- Wee Keong Liew
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Dual chip in package with a wire bonded die mounted to a substrate
- Patent number 6,586,825
- Issue date Jul 1, 2003
- LSI Logic Corporation
- Sarathy Rajagopalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test fixture for flip chip ball grid array circuits
- Patent number 6,433,565
- Issue date Aug 13, 2002
- LSI Logic Corporation
- Kishor V. Desai
- G01 - MEASURING TESTING
Information Patent Grant
Interposer tape for semiconductor package
- Patent number 6,429,534
- Issue date Aug 6, 2002
- LSI Logic Corporation
- Qwai H. Low
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer for semiconductor package assembly
- Patent number 6,335,491
- Issue date Jan 1, 2002
- LSI Logic Corporation
- Maniam Alagaratnam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bondable anodized aluminum heatspreader for semiconductor packages
- Patent number 6,297,550
- Issue date Oct 2, 2001
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grooved semiconductor die for flip-chip heat sink attachment
- Patent number 6,225,695
- Issue date May 1, 2001
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electroplating fixture for high density substrates
- Patent number 6,110,815
- Issue date Aug 29, 2000
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for packaging an integrated circuit using encapsu...
- Patent number 6,081,997
- Issue date Jul 4, 2000
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High power dissipating tape ball grid array package
- Patent number 6,057,594
- Issue date May 2, 2000
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Overmolded package body on a substrate
- Patent number 5,927,505
- Issue date Jul 27, 1999
- LSI Logic Corporation
- Chok J. Chia
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
Semiconductor die having sacrificial bond pads for die test
- Patent number 5,923,047
- Issue date Jul 13, 1999
- LSI Logic Corporation
- Chok J. Chia
- G01 - MEASURING TESTING
Information Patent Grant
Molded laminate package with integral mold gate
- Patent number 5,886,398
- Issue date Mar 23, 1999
- LSI Logic Corporation
- Qwai H. Low
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin power tape ball grid array package
- Patent number 5,869,889
- Issue date Feb 9, 1999
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball grid array package employing raised metal contact rings
- Patent number 5,841,191
- Issue date Nov 24, 1998
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball grid array package employing solid core solder balls
- Patent number 5,841,198
- Issue date Nov 24, 1998
- LSI Logic Corporation
- Chok J. Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked integrated chip package and method of making same
- Patent number 5,814,881
- Issue date Sep 29, 1998
- LSI Logic Corporation
- Maniam Alagaratnam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of improving molding of an overmolded package body on a subs...
- Patent number 5,744,084
- Issue date Apr 28, 1998
- LSI Logic Corporation
- Chok J. Chia
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
Snap on heat sink attachment
- Patent number 5,386,144
- Issue date Jan 31, 1995
- LSI Logic Corporation
- Patrick Variot
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for establishing improved thermal communicatio...
- Publication number 20050224955
- Publication date Oct 13, 2005
- LSI Logic Corporation
- Kishor V. Desai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wire bonding to full array bonding pads on active circuitry
- Publication number 20040178498
- Publication date Sep 16, 2004
- Qwai H. Low
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi chip module assembly
- Publication number 20040072377
- Publication date Apr 15, 2004
- Sarathy Rajagopalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrolytic contact pads
- Publication number 20040023481
- Publication date Feb 5, 2004
- Kishor Desai
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Maniam Alagaratnam

Person

Patents Grantslast 30 patents

Method and apparatus for establishing improved thermal communicatio...

Multi chip module assembly

Method of forming electrolytic contact pads including layers of cop...

Interposer for semiconductor package assembly

Integrated circuit package substrate with high density routing mech...

Dual chip in package with a wire bonded die mounted to a substrate

Test fixture for flip chip ball grid array circuits

Interposer tape for semiconductor package

Interposer for semiconductor package assembly

Bondable anodized aluminum heatspreader for semiconductor packages

Grooved semiconductor die for flip-chip heat sink attachment

Electroplating fixture for high density substrates

System and method for packaging an integrated circuit using encapsu...

High power dissipating tape ball grid array package

Overmolded package body on a substrate

Semiconductor die having sacrificial bond pads for die test

Molded laminate package with integral mold gate

Thin power tape ball grid array package

Ball grid array package employing raised metal contact rings

Ball grid array package employing solid core solder balls

Stacked integrated chip package and method of making same

Method of improving molding of an overmolded package body on a subs...

Snap on heat sink attachment

Patents Applicationslast 30 patents

Method and apparatus for establishing improved thermal communicatio...

Wire bonding to full array bonding pads on active circuitry

Multi chip module assembly

Electrolytic contact pads