Manjunath D. Haritsa

Follow

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Clock skew verification methodology for grid-based design
- Patent number 6,941,532
- Issue date Sep 6, 2005
- Sun Microsystems, Inc.
- Manjunath D. Haritsa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for topology based noise estimation of submicron...
- Patent number 6,665,845
- Issue date Dec 16, 2003
- Sun Microsystems, Inc.
- Kathirqamar Aingaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Windowing scheme for analyzing noise from multiple sources
- Patent number 6,587,815
- Issue date Jul 1, 2003
- Sun Microsystems, Inc.
- Kathirgamar Aingaran
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Clock skew verification methodology for grid-based design
- Publication number 20030074642
- Publication date Apr 17, 2003
- Sun Microsystems, Inc.
- Manjunath D. Haritsa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unified database system to store, combine, and manipulate clock rel...
- Publication number 20030074643
- Publication date Apr 17, 2003
- Ralf Schmitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simulation by parts method for grid-based clock distribution design
- Publication number 20030074175
- Publication date Apr 17, 2003
- Manjunath D. Haritsa
- G06 - COMPUTING CALCULATING COUNTING