Manmohan Rana

Person

Ghaziabad, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Register for at-speed scan testing
- Patent number 10,948,538
- Issue date Mar 16, 2021
- NXP USA, INC.
- Shikhar Makkar
- G11 - INFORMATION STORAGE
Information Patent Grant
Comparator circuit with feedback and method of operation
- Patent number 10,680,594
- Issue date Jun 9, 2020
- NXP USA, INC.
- Christopher James Micielli
- G01 - MEASURING TESTING
Information Patent Grant
Power management controller for integrated circuit
- Patent number 9,471,120
- Issue date Oct 18, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Nishant Singh Thakur
- G05 - CONTROLLING REGULATING
Information Patent Grant
Integrated circuit with internal and external voltage regulators
- Patent number 9,323,272
- Issue date Apr 26, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Manmohan Rana
- G05 - CONTROLLING REGULATING
Information Patent Grant
Read only memory having multi-bit line bit cell
- Patent number 9,286,998
- Issue date Mar 15, 2016
- Freescale Semiconductor,INC
- Paramjeet Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for preventing multiple resets
- Patent number 9,252,751
- Issue date Feb 2, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Nishant Singh Thakur
- G11 - INFORMATION STORAGE
Information Patent Grant
Crystal oscillator monitoring circuit
- Patent number 9,234,936
- Issue date Jan 12, 2016
- Freescale Semiconductor,INC
- Nishant Singh Thakur
- G01 - MEASURING TESTING
Information Patent Grant
Circuit for configuring external memory
- Patent number 9,142,280
- Issue date Sep 22, 2015
- FREESCALE SEMICONDUCOTR, INC.
- Rakesh Pandey
- G11 - INFORMATION STORAGE
Information Patent Grant
Well-biasing circuit for integrated circuit
- Patent number 8,890,602
- Issue date Nov 18, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Samaksh Sinha
- G05 - CONTROLLING REGULATING
Information Patent Grant
Power management circuit using two configuration signals to control...
- Patent number 8,762,753
- Issue date Jun 24, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read only memory and method of reading same
- Patent number 8,116,153
- Issue date Feb 14, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Manmohan Rana
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power read scheme for read only memory (ROM)
- Patent number 7,940,545
- Issue date May 10, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
REGISTER FOR AT-SPEED SCAN TESTING
- Publication number 20200386808
- Publication date Dec 10, 2020
- NXP USA, Inc.
- Shikhar Makkar
- G01 - MEASURING TESTING
Information Patent Application
COMPARATOR CIRCUIT WITH FEEDBACK AND METHOD OF OPERATION
- Publication number 20200021279
- Publication date Jan 16, 2020
- NXP USA, Inc.
- CHRISTOPHER JAMES MICIELLI
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR REDUCING LEAKAGE CURRENT IN MEMORY
- Publication number 20160180924
- Publication date Jun 23, 2016
- Paramjeet Singh
- G11 - INFORMATION STORAGE
Information Patent Application
CRYSTAL OSCILLATOR MONITORING CIRCUIT
- Publication number 20160033567
- Publication date Feb 4, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Nishant Singh Thakur
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT WITH INTERNAL AND EXTERNAL VOLTAGE REGULATORS
- Publication number 20150378385
- Publication date Dec 31, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Manmohan Rana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS AND METHOD FOR PREVENTING MULTIPLE RESETS
- Publication number 20150318842
- Publication date Nov 5, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Nishant Singh Thakur
- G11 - INFORMATION STORAGE
Information Patent Application
STANDARD CELL LAYOUT FOR LOGIC GATE
- Publication number 20150263039
- Publication date Sep 17, 2015
- Paramjeet Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WELL-BIASING CIRCUIT FOR INTEGRATED CIRCUIT
- Publication number 20140197883
- Publication date Jul 17, 2014
- Samaksh Sinha
- G05 - CONTROLLING REGULATING
Information Patent Application
POWER MANAGEMENT SYSTEM FOR ELECTRONIC CIRCUIT
- Publication number 20130339761
- Publication date Dec 19, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH DENSITY AND LOW VARIABILITY READ ONLY MEMORY
- Publication number 20110211382
- Publication date Sep 1, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND SENSE CIRCUITRY THEREFOR
- Publication number 20110128807
- Publication date Jun 2, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
READ ONLY MEMORY AND METHOD OF READING SAME
- Publication number 20100208506
- Publication date Aug 19, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Manmohan RANA
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER READ SCHEME FOR READ ONLY MEMORY (ROM)
- Publication number 20090316464
- Publication date Dec 24, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE

Manmohan Rana

Person

Patents Grantslast 30 patents

Register for at-speed scan testing

Comparator circuit with feedback and method of operation

Power management controller for integrated circuit

Integrated circuit with internal and external voltage regulators

Read only memory having multi-bit line bit cell

Apparatus and method for preventing multiple resets

Crystal oscillator monitoring circuit

Circuit for configuring external memory

Well-biasing circuit for integrated circuit

Power management circuit using two configuration signals to control...

Read only memory and method of reading same

Low power read scheme for read only memory (ROM)

Patents Applicationslast 30 patents

REGISTER FOR AT-SPEED SCAN TESTING

COMPARATOR CIRCUIT WITH FEEDBACK AND METHOD OF OPERATION

METHOD AND APPARATUS FOR REDUCING LEAKAGE CURRENT IN MEMORY

CRYSTAL OSCILLATOR MONITORING CIRCUIT

INTEGRATED CIRCUIT WITH INTERNAL AND EXTERNAL VOLTAGE REGULATORS

APPARATUS AND METHOD FOR PREVENTING MULTIPLE RESETS

STANDARD CELL LAYOUT FOR LOGIC GATE

WELL-BIASING CIRCUIT FOR INTEGRATED CIRCUIT

POWER MANAGEMENT SYSTEM FOR ELECTRONIC CIRCUIT

HIGH DENSITY AND LOW VARIABILITY READ ONLY MEMORY

MEMORY DEVICE AND SENSE CIRCUITRY THEREFOR

READ ONLY MEMORY AND METHOD OF READING SAME

LOW POWER READ SCHEME FOR READ ONLY MEMORY (ROM)