Manoj Chirania

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable logic block having reduced output delay during RAM wri...
- Patent number 7,804,719
- Issue date Sep 28, 2010
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of reducing power of a circuit
- Patent number 7,653,891
- Issue date Jan 26, 2010
- Xilinx, Inc.
- Jason H. Anderson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for simulation of negative bias and temperature instability
- Patent number 7,600,204
- Issue date Oct 6, 2009
- Xilinx, Inc.
- Manoj Chirania
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Estimating LUT power usage
- Patent number 7,552,410
- Issue date Jun 23, 2009
- Xilinx, Inc.
- Manoj Chirania
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process monitor vehicle
- Patent number 7,518,394
- Issue date Apr 14, 2009
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lookup table with relatively balanced delays
- Patent number 7,471,104
- Issue date Dec 30, 2008
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit including a multiplexer circuit
- Patent number 7,423,452
- Issue date Sep 9, 2008
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits and methods of implementing flip-flops in dual-output look...
- Patent number 7,385,416
- Issue date Jun 10, 2008
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interconnect driver circuits for dynamic logic
- Patent number 7,382,157
- Issue date Jun 3, 2008
- Xilinx, Inc.
- Steven P. Young
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lookup table circuits programmable to implement flip-flops
- Patent number 7,378,869
- Issue date May 27, 2008
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic block with dedicated and selectable lookup table...
- Patent number 7,375,552
- Issue date May 20, 2008
- Xilinx, Inc.
- Steven P. Young
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic block with carry chains providing lookahead func...
- Patent number 7,268,587
- Issue date Sep 11, 2007
- Xilinx, Inc.
- Tien Pham
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable lookup table with dual input and output terminals in R...
- Patent number 7,265,576
- Issue date Sep 4, 2007
- Xilinx, Inc.
- Venu M. Kondapalli
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable lookup table with dual input and output terminals in s...
- Patent number 7,215,138
- Issue date May 8, 2007
- Xilinx, Inc.
- Venu M. Kondapalli
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic block having improved performance when functioni...
- Patent number 7,202,697
- Issue date Apr 10, 2007
- Xilinx, Inc.
- Venu M. Kondapalli
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of measuring performance of a semiconductor device and circu...
- Patent number 7,119,570
- Issue date Oct 10, 2006
- Xilinx, Inc.
- Manoj Chirania
- G01 - MEASURING TESTING
Information Patent Grant
High performance programmable logic devices utilizing dynamic circu...
- Patent number 7,116,131
- Issue date Oct 3, 2006
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lookup table circuit optionally configurable as two or more smaller...
- Patent number 6,998,872
- Issue date Feb 14, 2006
- Xilinx, Inc.
- Manoj Chirania
- H03 - BASIC ELECTRONIC CIRCUITRY

Manoj Chirania

Person

Patents Grantslast 30 patents

Programmable logic block having reduced output delay during RAM wri...

Method of reducing power of a circuit

Method for simulation of negative bias and temperature instability

Estimating LUT power usage

Process monitor vehicle

Lookup table with relatively balanced delays

Integrated circuit including a multiplexer circuit

Circuits and methods of implementing flip-flops in dual-output look...

Interconnect driver circuits for dynamic logic

Lookup table circuits programmable to implement flip-flops

Programmable logic block with dedicated and selectable lookup table...

Programmable logic block with carry chains providing lookahead func...

Programmable lookup table with dual input and output terminals in R...

Programmable lookup table with dual input and output terminals in s...

Programmable logic block having improved performance when functioni...

Method of measuring performance of a semiconductor device and circu...

High performance programmable logic devices utilizing dynamic circu...

Lookup table circuit optionally configurable as two or more smaller...