Manuel Salcido

Person

Fort Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bias circuit for common-mode and semiconductor process voltage and...
- Patent number 7,952,398
- Issue date May 31, 2011
- Avago Technologies Enterprise IP (Singapore) Pte. Ltd.
- Manuel Salcido
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Identification of board connections for differential receivers
- Patent number 7,786,739
- Issue date Aug 31, 2010
- Avago Technologies Fiber IP (Singapore) Pte. Ltd.
- Manuel Salcido
- G01 - MEASURING TESTING
Information Patent Grant
High-speed receiver assembly
- Patent number 7,570,083
- Issue date Aug 4, 2009
- Avago Technologies Enterprise IP (Singapore) Pte. Ltd.
- Manuel Salcido
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Stable process induced correction bias circuitry for receivers on s...
- Patent number 7,313,372
- Issue date Dec 25, 2007
- Avago Technologies General IP Pte. Ltd.
- Manuel Salcido
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for matching data and clock signal delays to impr...
- Patent number 7,194,053
- Issue date Mar 20, 2007
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Gilbert Yoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for measuring switching noise in integrated ci...
- Patent number 7,159,160
- Issue date Jan 2, 2007
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Gilbert Yoh
- G01 - MEASURING TESTING
Information Patent Grant
Fixed termination scheme for differential receiver that compensates...
- Patent number 6,766,155
- Issue date Jul 20, 2004
- Agilent Technologies, Inc.
- Manuel Salcido
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Internal bus termination technique for integrated circuits with loc...
- Patent number 6,714,039
- Issue date Mar 30, 2004
- Agilent Technologies, Inc.
- Manuel Salcido
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
IDENTIFICATION OF BOARD CONNECTIONS FOR DIFFERENTIAL RECEIVERS
- Publication number 20090257481
- Publication date Oct 15, 2009
- Avago Technologies ECBU IP (Singapore) Pte, Ltd.
- Manuel Salcido
- G01 - MEASURING TESTING
Information Patent Application
Bias Circuit for Common-Mode and Semiconductor Process Voltage and...
- Publication number 20080268804
- Publication date Oct 30, 2008
- Manuel Salcido
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High-Speed Receiver Assembly
- Publication number 20080265986
- Publication date Oct 30, 2008
- Manuel Salcido
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Stable process induced correction bias circuitry for receivers on s...
- Publication number 20060025089
- Publication date Feb 2, 2006
- Manuel Salcido
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for measuring switching noise in integrated ci...
- Publication number 20050283698
- Publication date Dec 22, 2005
- Gilbert Yoh
- G01 - MEASURING TESTING
Information Patent Application
Internal bus termination technique for integrated circuits with loc...
- Publication number 20030210070
- Publication date Nov 13, 2003
- Manuel Salcido
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fixed termination scheme for differential receiver that compensates...
- Publication number 20030139164
- Publication date Jul 24, 2003
- Manuel Salcido
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for matching data and clock signal delays to impr...
- Publication number 20030112910
- Publication date Jun 19, 2003
- Gilbert Yoh
- G06 - COMPUTING CALCULATING COUNTING

Manuel Salcido

Person

Patents Grantslast 30 patents

Bias circuit for common-mode and semiconductor process voltage and...

Identification of board connections for differential receivers

High-speed receiver assembly

Stable process induced correction bias circuitry for receivers on s...

System and method for matching data and clock signal delays to impr...

Method and apparatus for measuring switching noise in integrated ci...

Fixed termination scheme for differential receiver that compensates...

Internal bus termination technique for integrated circuits with loc...

Patents Applicationslast 30 patents

IDENTIFICATION OF BOARD CONNECTIONS FOR DIFFERENTIAL RECEIVERS

Bias Circuit for Common-Mode and Semiconductor Process Voltage and...

High-Speed Receiver Assembly

Stable process induced correction bias circuitry for receivers on s...

Method and apparatus for measuring switching noise in integrated ci...

Internal bus termination technique for integrated circuits with loc...

Fixed termination scheme for differential receiver that compensates...

System and method for matching data and clock signal delays to impr...