Marc L. Tarabbia

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 12,148,702
- Issue date Nov 19, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 11,444,031
- Issue date Sep 13, 2022
- GLOBALFOUNDRIES U.S. INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal layer patterning for minimizing mechanical stress in integrat...
- Patent number 11,322,465
- Issue date May 3, 2022
- Cirrus Logic, Inc.
- Kathryn R. Holland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual device semiconductor structures with shared drain
- Patent number 10,917,052
- Issue date Feb 9, 2021
- Cirrus Logic, Inc.
- Shanjen Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density capacitors formed from thin vertical semiconductor str...
- Patent number 10,867,994
- Issue date Dec 15, 2020
- Cirrus Logic, Inc.
- Zhonghai Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 10,833,018
- Issue date Nov 10, 2020
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual gate metal-oxide-semiconductor field-effect transistor
- Patent number 10,586,865
- Issue date Mar 10, 2020
- Cirrus Logic, Inc.
- Scott Warrick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual device semiconductor structures with shared drain
- Patent number 10,298,184
- Issue date May 21, 2019
- Cirrus Logic, Inc.
- Shanjen Pan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Correction for speaker monitoring
- Patent number 10,123,143
- Issue date Nov 6, 2018
- Cirrus Logic, Inc.
- Vamsikrishna Parupalli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Sense resistor surroundingly positioned near or around and integrat...
- Patent number 10,020,357
- Issue date Jul 10, 2018
- Cirrus Logic, Inc.
- Scott Allan Woodford
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density capacitors formed from thin vertical semiconductor str...
- Patent number 9,929,147
- Issue date Mar 27, 2018
- Cirrus Logic, Inc.
- Zhonghai Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully depleted region for reduced parasitic capacitance between a p...
- Patent number 9,919,913
- Issue date Mar 20, 2018
- Cirrus Logic, Inc.
- Shanjen Pan
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Pinched doped well for a junction field effect transistor (JFET) is...
- Patent number 9,853,103
- Issue date Dec 26, 2017
- Cirrus Logic, Inc.
- Shanjen Pan
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 9,355,910
- Issue date May 31, 2016
- GLOBALFOUNDRIES, INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of electrical components on a semiconductor substrate by...
- Patent number 9,275,992
- Issue date Mar 1, 2016
- Cirrus Logic, Inc.
- Marc L. Tarabbia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming a low votage antifuse device and resulting device
- Patent number 9,177,963
- Issue date Nov 3, 2015
- GLOBALFOUNDRIES Inc.
- Anurag Mittal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming bipolar devices and an integrated circuit produc...
- Patent number 9,087,706
- Issue date Jul 21, 2015
- GLOBALFOUNDRIES Inc.
- Jerome Ciavatti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming finfet cell with fin tip and resulting device
- Patent number 9,059,093
- Issue date Jun 16, 2015
- GLOBALFOUNDRIES Inc.
- Marc Tarabbia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power rail layout for dense standard cell library
- Patent number 9,026,977
- Issue date May 5, 2015
- GLOBALFOUNDRIES Inc.
- Marc Tarabbia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Contact power rail
- Patent number 8,987,816
- Issue date Mar 24, 2015
- GLOBALFOUNDRIES Inc.
- Jason Stephens
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-coupling based design using diffusion contact structures
- Patent number 8,987,128
- Issue date Mar 24, 2015
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of forming bipolar devices and an integrated circuit produc...
- Patent number 8,975,130
- Issue date Mar 10, 2015
- GLOBALFOUNDRIES Inc.
- Jerome Ciavatti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact power rail
- Patent number 8,946,914
- Issue date Feb 3, 2015
- GLOBALFOUNDRIES Inc.
- Jason Eugene Stephens
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Locally optimized coloring for cleaning lithographic hotspots
- Patent number 8,869,075
- Issue date Oct 21, 2014
- GLOBALFOUNDRIES Inc.
- Yuyang Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Via non-standard limiting parameters
- Patent number 8,793,627
- Issue date Jul 29, 2014
- GLOBALFOUNDRIES Inc.
- Jason E. Stephens
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trench silicide mask generation using designated trench transfer an...
- Patent number 8,775,980
- Issue date Jul 8, 2014
- GLOBALFOUNDRIES, INC.
- Mohamed Salama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits having a continuous active area and methods for...
- Patent number 8,736,061
- Issue date May 27, 2014
- GLOBALFOUNDRIES, INC.
- Frank Johnson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices formed on a continuous active region with an...
- Patent number 8,618,607
- Issue date Dec 31, 2013
- GLOBALFOUNDRIES Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having contact layer providing electrical conn...
- Patent number 8,598,633
- Issue date Dec 3, 2013
- GLOBALFOUNDRIES, INC.
- Marc Tarabbia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with transistor local interconnects
- Patent number 8,581,348
- Issue date Nov 12, 2013
- GLOBALFOUNDRIES, INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20250038111
- Publication date Jan 30, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT WITH GETTER LAYER FOR HYDROGEN ENTRAPMENT
- Publication number 20230223274
- Publication date Jul 13, 2023
- CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
- Marc L. Tarabbia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20220367360
- Publication date Nov 17, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL LAYER PATTERNING FOR MINIMIZING MECHANICAL STRESS IN INTEGRAT...
- Publication number 20210066221
- Publication date Mar 4, 2021
- Cirrus Logic International Semiconductor Ltd.
- Kathryn Rose HOLLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20210013150
- Publication date Jan 14, 2021
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20190326219
- Publication date Oct 24, 2019
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL DEVICE SEMICONDUCTOR STRUCTURES WITH SHARED DRAIN
- Publication number 20190238104
- Publication date Aug 1, 2019
- Cirrus Logic International Semiconductor Ltd.
- Shanjen Pan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUAL GATE METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR
- Publication number 20190103490
- Publication date Apr 4, 2019
- Cirrus Logic International Semiconductor Ltd.
- Scott WARRICK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY CAPACITORS FORMED FROM THIN VERTICAL SEMICONDUCTOR STR...
- Publication number 20180190648
- Publication date Jul 5, 2018
- Cirrus Logic, Inc.
- Zhonghai Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORRECTION FOR SPEAKER MONITORING
- Publication number 20180091911
- Publication date Mar 29, 2018
- Cirrus Logic International Semiconductor Ltd.
- Vamsikrishna Parupalli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PINCHED DOPED WELL FOR A JUNCTION FIELD EFFECT TRANSISTOR (JFET) IS...
- Publication number 20170294512
- Publication date Oct 12, 2017
- Cirrus Logic International Semiconductor Ltd.
- Shanjen Pan
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
DUAL DEVICE SEMICONDUCTOR STRUCTURES WITH SHARED DRAIN
- Publication number 20170272042
- Publication date Sep 21, 2017
- Cirrus Logic International Semiconductor Ltd.
- Shanjen Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY CAPACITORS FORMED FROM THIN VERTICAL SEMICONDUCTOR STR...
- Publication number 20160329321
- Publication date Nov 10, 2016
- Zhonghai Shi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SENSE RESISTOR SURROUNDINGLY POSITIONED NEAR OR AROUND AND INTEGRAT...
- Publication number 20160322455
- Publication date Nov 3, 2016
- Cirrus Logic International Semiconductor Ltd.
- Scott Allan Woodford
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20160268204
- Publication date Sep 15, 2016
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY DEPLETED REGION FOR REDUCED PARASITIC CAPACITANCE BETWEEN A P...
- Publication number 20160145093
- Publication date May 26, 2016
- Cirrus Logic, Inc.
- Shanjen Pan
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
FORMING FINFET CELL WITH FIN TIP AND RESULTING DEVICE
- Publication number 20150137203
- Publication date May 21, 2015
- GLOBALFOUNDRIES INC.
- Marc TARABBIA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING A LOW VOTAGE ANTIFUSE DEVICE AND RESULTING DEVICE
- Publication number 20150137258
- Publication date May 21, 2015
- GLOBALFOUNDRIES INC.
- Anurag MITTAL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING BIPOLAR DEVICES AND AN INTEGRATED CIRCUIT PRODUC...
- Publication number 20150108580
- Publication date Apr 23, 2015
- GLOBALFOUNDRIES INC.
- Jerome Ciavatti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER RAIL LAYOUT FOR DENSE STANDARD CELL LIBRARY
- Publication number 20150052494
- Publication date Feb 19, 2015
- GLOBALFOUNDRIES INC.
- Marc TARABBIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTACT POWER RAIL
- Publication number 20150035052
- Publication date Feb 5, 2015
- GLOBALFOUNDRIES INC.
- Jason STEPHENS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF FORMING BIPOLAR DEVICES AND AN INTEGRATED CIRCUIT PRODUC...
- Publication number 20150001634
- Publication date Jan 1, 2015
- GLOBALFOUNDRIES INC.
- Jerome Ciavatti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
14 LPM CONTACT POWER RAIL
- Publication number 20140246791
- Publication date Sep 4, 2014
- GLOBALFOUNDRIES INC.
- Jason Eugene STEPHENS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCALLY OPTIMIZED COLORING FOR CLEANING LITHOGRAPHIC HOTSPOTS
- Publication number 20140173533
- Publication date Jun 19, 2014
- GLOBALFOUNDRIES INC.
- Yuyang Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRENCH SILICIDE MASK GENERATION USING DESIGNATED TRENCH TRANSFER AN...
- Publication number 20140149952
- Publication date May 29, 2014
- GLOBALFOUNDRIES INC.
- Mohamed SALAMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CROSS-COUPLING BASED DESIGN USING DIFFUSION CONTACT STRUCTURES
- Publication number 20140027918
- Publication date Jan 30, 2014
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICES FORMED ON A CONTINUOUS ACTIVE REGION WITH AN...
- Publication number 20140001563
- Publication date Jan 2, 2014
- GLOBALFOUNDRIES INC.
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS HAVING A CONTINUOUS ACTIVE AREA AND METHODS FOR...
- Publication number 20130328205
- Publication date Dec 12, 2013
- GLOBALFOUNDRIES INC.
- Frank Johnson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20130181289
- Publication date Jul 18, 2013
- GLOBALFOUNDRIES INC.
- Marc Tarabbia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
- Publication number 20130146986
- Publication date Jun 13, 2013
- Mahbub Rashed
- H01 - BASIC ELECTRIC ELEMENTS

Marc L. Tarabbia

Person

Patents Grantslast 30 patents

Semiconductor device with transistor local interconnects

Semiconductor device with transistor local interconnects

Metal layer patterning for minimizing mechanical stress in integrat...

Dual device semiconductor structures with shared drain

High density capacitors formed from thin vertical semiconductor str...

Semiconductor device with transistor local interconnects

Dual gate metal-oxide-semiconductor field-effect transistor

Dual device semiconductor structures with shared drain

Correction for speaker monitoring

Sense resistor surroundingly positioned near or around and integrat...

High density capacitors formed from thin vertical semiconductor str...

Fully depleted region for reduced parasitic capacitance between a p...

Pinched doped well for a junction field effect transistor (JFET) is...

Semiconductor device with transistor local interconnects

Formation of electrical components on a semiconductor substrate by...

Forming a low votage antifuse device and resulting device

Methods of forming bipolar devices and an integrated circuit produc...

Forming finfet cell with fin tip and resulting device

Power rail layout for dense standard cell library

Contact power rail

Cross-coupling based design using diffusion contact structures

Methods of forming bipolar devices and an integrated circuit produc...

Contact power rail

Locally optimized coloring for cleaning lithographic hotspots

Via non-standard limiting parameters

Trench silicide mask generation using designated trench transfer an...

Integrated circuits having a continuous active area and methods for...

Semiconductor devices formed on a continuous active region with an...

Semiconductor device having contact layer providing electrical conn...

Semiconductor device with transistor local interconnects

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

INTEGRATED CIRCUIT WITH GETTER LAYER FOR HYDROGEN ENTRAPMENT

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

METAL LAYER PATTERNING FOR MINIMIZING MECHANICAL STRESS IN INTEGRAT...

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

DUAL DEVICE SEMICONDUCTOR STRUCTURES WITH SHARED DRAIN

DUAL GATE METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR

HIGH DENSITY CAPACITORS FORMED FROM THIN VERTICAL SEMICONDUCTOR STR...

CORRECTION FOR SPEAKER MONITORING

PINCHED DOPED WELL FOR A JUNCTION FIELD EFFECT TRANSISTOR (JFET) IS...

DUAL DEVICE SEMICONDUCTOR STRUCTURES WITH SHARED DRAIN

HIGH DENSITY CAPACITORS FORMED FROM THIN VERTICAL SEMICONDUCTOR STR...

SENSE RESISTOR SURROUNDINGLY POSITIONED NEAR OR AROUND AND INTEGRAT...

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS

FULLY DEPLETED REGION FOR REDUCED PARASITIC CAPACITANCE BETWEEN A P...

FORMING FINFET CELL WITH FIN TIP AND RESULTING DEVICE

FORMING A LOW VOTAGE ANTIFUSE DEVICE AND RESULTING DEVICE

METHODS OF FORMING BIPOLAR DEVICES AND AN INTEGRATED CIRCUIT PRODUC...

POWER RAIL LAYOUT FOR DENSE STANDARD CELL LIBRARY

CONTACT POWER RAIL

METHODS OF FORMING BIPOLAR DEVICES AND AN INTEGRATED CIRCUIT PRODUC...

14 LPM CONTACT POWER RAIL

LOCALLY OPTIMIZED COLORING FOR CLEANING LITHOGRAPHIC HOTSPOTS

TRENCH SILICIDE MASK GENERATION USING DESIGNATED TRENCH TRANSFER AN...

CROSS-COUPLING BASED DESIGN USING DIFFUSION CONTACT STRUCTURES

SEMICONDUCTOR DEVICES FORMED ON A CONTINUOUS ACTIVE REGION WITH AN...

INTEGRATED CIRCUITS HAVING A CONTINUOUS ACTIVE AREA AND METHODS FOR...

SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS