Marc LOINAZ

Person

Los Altos Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
High precision multi-chip clock synchronization
- Patent number 12,166,570
- Issue date Dec 10, 2024
- Anacapa Semiconductor
- Marc Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lidar system with a time synchronized sensor network for precision...
- Patent number 12,081,223
- Issue date Sep 3, 2024
- Anacapa Semiconductor, Inc.
- Marc Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Positron emission tomography system with a time synchronized network
- Patent number 12,021,536
- Issue date Jun 25, 2024
- Anacapa Semiconductor, Inc.
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Grant
Time coherent network
- Patent number 11,619,719
- Issue date Apr 4, 2023
- Anacapa Semiconductor, Inc.
- Marc Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fluorescence lifetime imaging (FLIM) and flow cytometry application...
- Patent number 11,480,514
- Issue date Oct 25, 2022
- Anacapa Semiconductor, Inc.
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Grant
High precision multi-chip clock synchronization
- Patent number 10,911,171
- Issue date Feb 2, 2021
- Anacapa Semiconductor, Inc.
- Marc Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-value logic signaling in multi-functional circuits
- Patent number 9,094,020
- Issue date Jul 28, 2015
- Broadcom Corporation
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Grant
Low power serial link
- Patent number 8,964,905
- Issue date Feb 24, 2015
- NetLogic Microsystems, Inc.
- Marc Loinaz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable drive strength in memory signaling
- Patent number 8,700,944
- Issue date Apr 15, 2014
- NetLogic Microsystems, Inc.
- Marc Loinaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repeate architecture with single clock multiplier unit
- Patent number 8,638,896
- Issue date Jan 28, 2014
- NetLogic Microsystems, Inc.
- Dean Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems, circuits, and methods for a sigma-delta based time to digi...
- Patent number 8,618,967
- Issue date Dec 31, 2013
- Broadcom Corporation
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems, circuits, and methods for a digital frequency synthesizer
- Patent number 8,552,767
- Issue date Oct 8, 2013
- Broadcom Corporation
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-value logic signaling in multi-functional circuits
- Patent number 8,520,744
- Issue date Aug 27, 2013
- NetLogic Microsystems, Inc.
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for frequency synthesis with feedback interpo...
- Patent number 8,433,018
- Issue date Apr 30, 2013
- Netlogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable drive strength in memory signaling
- Patent number 8,423,814
- Issue date Apr 16, 2013
- NetLogic Microsystems, Inc.
- Marc Loinaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power serial link
- Patent number 8,000,412
- Issue date Aug 16, 2011
- Netlogic Microsystems, Inc.
- Marc Loinaz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital linear voltage regulator
- Patent number 7,919,957
- Issue date Apr 5, 2011
- Netlogic Microsystems, Inc.
- Shwetabh Verma
- G05 - CONTROLLING REGULATING
Information Patent Grant
Digital linear voltage regulator
- Patent number 7,679,345
- Issue date Mar 16, 2010
- NetLogic Microsystems, Inc.
- Shwetabh Verma
- G05 - CONTROLLING REGULATING
Information Patent Grant
Methods and apparatus for clock and data recovery using a single so...
- Patent number 7,532,697
- Issue date May 12, 2009
- Net Logic Microsystems, Inc.
- Stefanos Sidiropoulos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for minimizing jitter in a clock synthesis ci...
- Patent number 7,436,229
- Issue date Oct 14, 2008
- Net Logic Microsystems, Inc.
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for frequency synthesis with feedback interpo...
- Patent number 7,432,750
- Issue date Oct 7, 2008
- NetLogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for generating multiple clocks using feedback...
- Patent number 7,323,916
- Issue date Jan 29, 2008
- NetLogic Microsystems, Inc.
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for improving large signal performance for ac...
- Patent number 7,009,425
- Issue date Mar 7, 2006
- Aeluros, Inc.
- Marc J Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Activ shunt-peaked logic gates
- Patent number 6,788,103
- Issue date Sep 7, 2004
- Aeluros, Inc.
- Arnold R. Feldman
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
POSITRON EMISSION TOMOGRAPHY SYSTEM WITH A TIME SYNCHRONIZED NETWORK
- Publication number 20230006677
- Publication date Jan 5, 2023
- Marc Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH PRECISION MULTI-CHIP CLOCK SYNCHRONIZATION
- Publication number 20210152269
- Publication date May 20, 2021
- Marc Loinaz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FLUORESCENCE LIFETIME IMAGING (FLIM) AND FLOW CYTOMETRY APPLICATION...
- Publication number 20190360911
- Publication date Nov 28, 2019
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Application
TIME COHERENT NETWORK
- Publication number 20190302245
- Publication date Oct 3, 2019
- Marc Loinaz
- G01 - MEASURING TESTING
Information Patent Application
HIGH PRECISION MULTI-CHIP CLOCK SYNCHRONIZATION
- Publication number 20190305865
- Publication date Oct 3, 2019
- Marc Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPLICATIONS FOR A TIME COHERENT NETWORK FOR PRECISION SENSING
- Publication number 20190268003
- Publication date Aug 29, 2019
- Marc Loinaz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multi-Value Logic Signaling in Multi-Functional Circuits
- Publication number 20130285736
- Publication date Oct 31, 2013
- Marc LOINAZ
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS, CIRCUITS, AND METHODS FOR A DIGITAL FREQUENCY SYNTHESIZER
- Publication number 20130257485
- Publication date Oct 3, 2013
- BROADCOM CORPORATION
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems, Circuits, and Methods for a Sigma-Delta Based Time to Digi...
- Publication number 20130257494
- Publication date Oct 3, 2013
- BROADCOM CORPORATION
- Parastoo Nikaeen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable Drive Strength in Memory Signaling
- Publication number 20130159612
- Publication date Jun 20, 2013
- NetLogic Microsystems, Inc.
- Marc LOINAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Repeater Architecture with Single Clock Multiplier Unit
- Publication number 20110228889
- Publication date Sep 22, 2011
- Dean Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multi-Value Logic Signaling in Multi-Functional Circuits
- Publication number 20110228860
- Publication date Sep 22, 2011
- Marc Loinaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable Drive Strength in Memory Signaling
- Publication number 20110231692
- Publication date Sep 22, 2011
- Marc Loinaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital Linear Voltage Regulator
- Publication number 20100164445
- Publication date Jul 1, 2010
- Shwetabh Verma
- G05 - CONTROLLING REGULATING
Information Patent Application
Methods and Apparatus for Frequency Synthesis with Feedback Interpo...
- Publication number 20080260071
- Publication date Oct 23, 2008
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and Apparatus for Minimizing Jitter in a Clock Synthesis Ci...
- Publication number 20080048734
- Publication date Feb 28, 2008
- Stefanos Sidiropoulos
- H03 - BASIC ELECTRONIC CIRCUITRY

Marc LOINAZ

Person

Patents Grantslast 30 patents

High precision multi-chip clock synchronization

Lidar system with a time synchronized sensor network for precision...

Positron emission tomography system with a time synchronized network

Time coherent network

Fluorescence lifetime imaging (FLIM) and flow cytometry application...

High precision multi-chip clock synchronization

Multi-value logic signaling in multi-functional circuits

Low power serial link

Programmable drive strength in memory signaling

Repeate architecture with single clock multiplier unit

Systems, circuits, and methods for a sigma-delta based time to digi...

Systems, circuits, and methods for a digital frequency synthesizer

Multi-value logic signaling in multi-functional circuits

Methods and apparatus for frequency synthesis with feedback interpo...

Programmable drive strength in memory signaling

Low power serial link

Digital linear voltage regulator

Digital linear voltage regulator

Methods and apparatus for clock and data recovery using a single so...

Methods and apparatus for minimizing jitter in a clock synthesis ci...

Methods and apparatus for frequency synthesis with feedback interpo...

Methods and apparatus for generating multiple clocks using feedback...

Methods and apparatus for improving large signal performance for ac...

Activ shunt-peaked logic gates

Patents Applicationslast 30 patents

POSITRON EMISSION TOMOGRAPHY SYSTEM WITH A TIME SYNCHRONIZED NETWORK

HIGH PRECISION MULTI-CHIP CLOCK SYNCHRONIZATION

FLUORESCENCE LIFETIME IMAGING (FLIM) AND FLOW CYTOMETRY APPLICATION...

TIME COHERENT NETWORK

HIGH PRECISION MULTI-CHIP CLOCK SYNCHRONIZATION

APPLICATIONS FOR A TIME COHERENT NETWORK FOR PRECISION SENSING

Multi-Value Logic Signaling in Multi-Functional Circuits

SYSTEMS, CIRCUITS, AND METHODS FOR A DIGITAL FREQUENCY SYNTHESIZER

Systems, Circuits, and Methods for a Sigma-Delta Based Time to Digi...

Programmable Drive Strength in Memory Signaling

Repeater Architecture with Single Clock Multiplier Unit

Multi-Value Logic Signaling in Multi-Functional Circuits

Programmable Drive Strength in Memory Signaling

Digital Linear Voltage Regulator

Methods and Apparatus for Frequency Synthesis with Feedback Interpo...

Methods and Apparatus for Minimizing Jitter in a Clock Synthesis Ci...