Marc R. Faucher

Person

South Burlington, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Connection management method, system, and program product
- Patent number 8,244,880
- Issue date Aug 14, 2012
- International Business Machines Corporation
- Marc R. Faucher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Structures for semiconductor structures with error detection and co...
- Patent number 8,146,046
- Issue date Mar 27, 2012
- International Business Machines Corporation
- Timothy Joseph Dalton
- G01 - MEASURING TESTING
Information Patent Grant
Three-dimensional networking design structure
- Patent number 8,019,970
- Issue date Sep 13, 2011
- International Business Machines Corporation
- Kerry Bernstein
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for integrating SRAM and DRAM architecture in set...
- Patent number 7,962,695
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for implementing prioritized refresh of DRAM base...
- Patent number 7,882,302
- Issue date Feb 1, 2011
- International Business Machines Corporation
- Marc R. Faucher
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Three-dimensional networking structure
- Patent number 7,865,694
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Kerry Bernstein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Error detection and correction in semiconductor structures
- Patent number 7,526,698
- Issue date Apr 28, 2009
- International Business Machines Corporation
- Timothy Joseph Dalton
- G01 - MEASURING TESTING
Information Patent Grant
Data processing system with adjustable clocks for partitioned synch...
- Patent number 6,578,155
- Issue date Jun 10, 2003
- International Business Machines Corporation
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for allocating data and instructions within a...
- Patent number 6,532,520
- Issue date Mar 11, 2003
- International Business Machines Corporation
- Alvar A. Dean
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for making a memory card adapter insertable into a motherboa...
- Patent number 6,457,155
- Issue date Sep 24, 2002
- International Business Machines
- Timothy J. Dell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory card design with parity and ECC for non-parity and non-ECC s...
- Patent number 6,185,718
- Issue date Feb 6, 2001
- International Business Machines Corporation
- Timothy J. Dell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor system requests burstable access to noncacheable mem...
- Patent number 6,178,467
- Issue date Jan 23, 2001
- International Business Machines Corporation
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory card adapter insertable into a motherboard memory card socke...
- Patent number 6,108,730
- Issue date Aug 22, 2000
- International Business Machines Corporation
- Timothy J. Dell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically configurable memory adapter using electronic presence d...
- Patent number 6,092,146
- Issue date Jul 18, 2000
- Timothy Jay Dell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for ECC bus protection in a computer system wi...
- Patent number 6,052,818
- Issue date Apr 18, 2000
- International Business Machines Corporation
- Timothy J. Dell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Narrow data width DRAM with low latency page-hit operations
- Patent number 5,969,997
- Issue date Oct 19, 1999
- International Business Machines Corporation
- Michael P. Clinton
- G11 - INFORMATION STORAGE
Information Patent Grant
Stackable memory card
- Patent number 5,963,464
- Issue date Oct 5, 1999
- International Business Machines Corporation
- Timothy J. Dell
- G11 - INFORMATION STORAGE
Information Patent Grant
Universal chip carrier connector
- Patent number 5,959,845
- Issue date Sep 28, 1999
- International Business Machines Corporation
- Marc R. Faucher
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Non-contiguous mapping of I/O addresses to use page protection of a...
- Patent number 5,548,746
- Issue date Aug 20, 1996
- International Business Machines Corporation
- Gary D. Carpenter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for combining data from multiple CPU write requests via buff...
- Patent number 5,459,842
- Issue date Oct 17, 1995
- International Business Machines Corporation
- Ralph M. Begun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connecting a short word length non-volatile memory to a long word l...
- Patent number 5,448,521
- Issue date Sep 5, 1995
- International Business Machines Corporation
- Sean E. Curry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for reducing an amount of power utilized by selec...
- Patent number 5,404,543
- Issue date Apr 4, 1995
- International Business Machines Corporation
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR INTEGRATING SRAM AND DRAM ARCHITECTURE IN SET...
- Publication number 20090144503
- Publication date Jun 4, 2009
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR IMPLEMENTING PRIORITIZED REFRESH OF DRAM BASE...
- Publication number 20090144491
- Publication date Jun 4, 2009
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE-DIMENSIONAL NETWORKING DESIGN STRUCTURE
- Publication number 20090138581
- Publication date May 28, 2009
- International Business Machines Corporation
- Kerry Bernstein
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONNECTION MANAGEMENT METHOD, SYSTEM, AND PROGRAM PRODUCT
- Publication number 20080313339
- Publication date Dec 18, 2008
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN STRUCTURES FOR SEMICONDUCTOR STRUCTURES WITH ERROR DETECTION...
- Publication number 20080216031
- Publication date Sep 4, 2008
- Timothy Joseph Dalton
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Translating Data Packets From One Network...
- Publication number 20080037568
- Publication date Feb 14, 2008
- Richard Eugene Anderson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
THREE-DIMENSIONAL NETWORKING STRUCTURE
- Publication number 20070266129
- Publication date Nov 15, 2007
- International Business Machines Corporation
- Kerry Bernstein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ERROR DETECTION AND CORRECTION IN SEMICONDUCTOR STRUCTURES
- Publication number 20070241398
- Publication date Oct 18, 2007
- Timothy Joseph Dalton
- G01 - MEASURING TESTING
Information Patent Application
CONNECTION MANAGEMENT METHOD, SYSTEM, AND PROGRAM PRODUCT
- Publication number 20060235957
- Publication date Oct 19, 2006
- Marc R. Faucher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR TRANSLATING DATA PACKETS FROM ONE NETWORK...
- Publication number 20050078704
- Publication date Apr 14, 2005
- International Business Machines Corporation
- Richard Eugene Anderson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Marc R. Faucher

Person

Patents Grantslast 30 patents

Connection management method, system, and program product

Structures for semiconductor structures with error detection and co...

Three-dimensional networking design structure

Method and system for integrating SRAM and DRAM architecture in set...

Method and system for implementing prioritized refresh of DRAM base...

Three-dimensional networking structure

Error detection and correction in semiconductor structures

Data processing system with adjustable clocks for partitioned synch...

Method and apparatus for allocating data and instructions within a...

Method for making a memory card adapter insertable into a motherboa...

Memory card design with parity and ECC for non-parity and non-ECC s...

Microprocessor system requests burstable access to noncacheable mem...

Memory card adapter insertable into a motherboard memory card socke...

Dynamically configurable memory adapter using electronic presence d...

Method and apparatus for ECC bus protection in a computer system wi...

Narrow data width DRAM with low latency page-hit operations

Stackable memory card

Universal chip carrier connector

Non-contiguous mapping of I/O addresses to use page protection of a...

System for combining data from multiple CPU write requests via buff...

Connecting a short word length non-volatile memory to a long word l...

Method and system for reducing an amount of power utilized by selec...

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR INTEGRATING SRAM AND DRAM ARCHITECTURE IN SET...

METHOD AND SYSTEM FOR IMPLEMENTING PRIORITIZED REFRESH OF DRAM BASE...

THREE-DIMENSIONAL NETWORKING DESIGN STRUCTURE

CONNECTION MANAGEMENT METHOD, SYSTEM, AND PROGRAM PRODUCT

DESIGN STRUCTURES FOR SEMICONDUCTOR STRUCTURES WITH ERROR DETECTION...

Method and Apparatus for Translating Data Packets From One Network...

THREE-DIMENSIONAL NETWORKING STRUCTURE

ERROR DETECTION AND CORRECTION IN SEMICONDUCTOR STRUCTURES

CONNECTION MANAGEMENT METHOD, SYSTEM, AND PROGRAM PRODUCT

METHOD AND APPARATUS FOR TRANSLATING DATA PACKETS FROM ONE NETWORK...