Marcello Carrera

Person

Trescore Balneario, IT

People

Patents Grantslast 30 patents

Information Patent Grant
CMOS switch circuit for transferring high voltages, in particular f...
- Patent number 6,433,583
- Issue date Aug 13, 2002
- STMicroelectronics S.r.l.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Grant
Row decoder for a nonvolatile memory with capability of selectively...
- Patent number 6,356,481
- Issue date Mar 12, 2002
- STMicroelectronics S.r.l.
- Rino Micheloni
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage regulator for single feed voltage memory circuits, and flas...
- Patent number 6,285,614
- Issue date Sep 4, 2001
- STMicroelectronics S.r.l.
- Jacopo Mulatti
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell voltage regulator with temperature correlated voltage g...
- Patent number 6,184,670
- Issue date Feb 6, 2001
- STMicroelectronics S.r.l.
- Jacopo Mulatti
- G05 - CONTROLLING REGULATING
Information Patent Grant
Voltage regulator for single feed voltage memory circuits, and flas...
- Patent number 6,101,118
- Issue date Aug 8, 2000
- STMicroelectronics, S.r.l.
- Jacopo Mulatti
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash EEPROM with controlled discharge time of the word lines and s...
- Patent number 5,999,456
- Issue date Dec 7, 1999
- STMicroelectronics S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative word line voltage regulation circuit for electrically eras...
- Patent number 5,920,505
- Issue date Jul 6, 1999
- STMicroelectronics, S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for setting the threshold voltage of a reference memory cell
- Patent number 5,784,314
- Issue date Jul 21, 1998
- SGS Thomson Microelectronics S.r.l.
- Mauro Sali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash EEPROM with controlled discharge time of the word lines and s...
- Patent number 5,719,807
- Issue date Feb 17, 1998
- SGS Thomson Microelectronics S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative word line voltage regulation circuit for electrically eras...
- Patent number 5,659,502
- Issue date Aug 19, 1997
- SGS Thomson Microelectronics S.r.l.
- Mauro Sali
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy circuitry layout for a semiconductor memory device
- Patent number 5,559,743
- Issue date Sep 24, 1996
- SGS Thomson Microelectronics S.r.l.
- Luigi Pascucci
- G11 - INFORMATION STORAGE

Marcello Carrera

Person

Patents Grantslast 30 patents

CMOS switch circuit for transferring high voltages, in particular f...

Row decoder for a nonvolatile memory with capability of selectively...

Voltage regulator for single feed voltage memory circuits, and flas...

Memory cell voltage regulator with temperature correlated voltage g...

Voltage regulator for single feed voltage memory circuits, and flas...

Flash EEPROM with controlled discharge time of the word lines and s...

Negative word line voltage regulation circuit for electrically eras...

Method for setting the threshold voltage of a reference memory cell

Flash EEPROM with controlled discharge time of the word lines and s...

Negative word line voltage regulation circuit for electrically eras...

Redundancy circuitry layout for a semiconductor memory device