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Marcelo Glusman
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San Jose, CA, US
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last 30 patents
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Patent Grant
Verifying multiple constraints for circuit designs
Patent number
8,209,648
Issue date
Jun 26, 2012
Cadence Design Systems, Inc.
Shan-Chyun Ku
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Method and system for generating design constraints
Patent number
7,962,886
Issue date
Jun 14, 2011
Cadence Design Systems, Inc.
Manish Pandey
G06 - COMPUTING CALCULATING COUNTING