Marco Sforzin

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for on-ASIC error control decoding
- Patent number 12,088,322
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Marco Sforzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Iterative error correction in memory systems
- Patent number 11,949,428
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Marco Sforzin
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
- Publication number 20240413840
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Marco SFORZIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DECODER FOR INTERLEAVED REED-SOLOMON (IRS) WITH ERASURE/COLLABORATIVE
- Publication number 20240378114
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Joseph M. MCCRATE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLLABORATIVE DECODING WITH ERASURE SEARCH TO RECOVER CORNER FAILS
- Publication number 20240378113
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Joseph M. MCCRATE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECODER FOR BURST CORRECTION READ SOLOMON DECODING FOR MEMORY APPLI...
- Publication number 20240345920
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Joseph M. MCCRATE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HETEROGENOUS INTERLEAVED REED-SOLOMON (HETIRS) WITH ERASURE DECODING
- Publication number 20240297668
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Joseph M. MCCRATE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERLEAVED REED-SOLOMON (IRS) WITH COLLABORATIVE DECODING
- Publication number 20240296090
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Joseph M. MCCRATE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BURST CORRECTION REED SOLOMON DECODING FOR MEMORY APPLICATIONS
- Publication number 20240272981
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Joseph M. MCCRATE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR OFF-LINE REPAIRING AND SUBSEQUENT REINTEGRATI...
- Publication number 20230229560
- Publication date Jul 20, 2023
- Micron Technology, Inc.
- Marco Sforzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS
- Publication number 20230231573
- Publication date Jul 20, 2023
- Micron Technology, Inc.
- Marco SFORZIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND SYSTEM FOR ON-ASIC ERROR CONTROL DECODING
- Publication number 20230231578
- Publication date Jul 20, 2023
- Micron Technology, Inc.
- Marco SFORZIN
- H03 - BASIC ELECTRONIC CIRCUITRY

Marco Sforzin

Person

Patents Grantslast 30 patents

Method and system for on-ASIC error control decoding

Iterative error correction in memory systems

Patents Applicationslast 30 patents

ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS

DECODER FOR INTERLEAVED REED-SOLOMON (IRS) WITH ERASURE/COLLABORATIVE

COLLABORATIVE DECODING WITH ERASURE SEARCH TO RECOVER CORNER FAILS

DECODER FOR BURST CORRECTION READ SOLOMON DECODING FOR MEMORY APPLI...

HETEROGENOUS INTERLEAVED REED-SOLOMON (HETIRS) WITH ERASURE DECODING

INTERLEAVED REED-SOLOMON (IRS) WITH COLLABORATIVE DECODING

BURST CORRECTION REED SOLOMON DECODING FOR MEMORY APPLICATIONS

METHOD AND SYSTEM FOR OFF-LINE REPAIRING AND SUBSEQUENT REINTEGRATI...

ITERATIVE ERROR CORRECTION IN MEMORY SYSTEMS

METHOD AND SYSTEM FOR ON-ASIC ERROR CONTROL DECODING