Marek J. Marasch

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Longmont, CO, US

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Patents Grantslast 30 patents

Information Patent Grant
Parallel interface pattern modification for addressing signal integ...
- Patent number 9,148,171
- Issue date Sep 29, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Marek J. Marasch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for decreasing signal integrity noise by using va...
- Patent number 8,890,564
- Issue date Nov 18, 2014
- LSI Corporation
- Jay D. Harker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overshoot suppression for input/output buffers
- Patent number 8,773,192
- Issue date Jul 8, 2014
- LSI Corporation
- Mark F. Turner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of generating a restricted inline resistive fault pattern an...
- Patent number 8,055,467
- Issue date Nov 8, 2011
- LSI Corporation
- Jeff S. Brown
- G01 - MEASURING TESTING
Information Patent Grant
Testable tristate bus keeper
- Patent number 7,676,716
- Issue date Mar 9, 2010
- LSI Corporation
- Jeffrey S. Brown
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
OVERSHOOT SUPPRESSION FOR INPUT/OUTPUT BUFFERS
- Publication number 20140145775
- Publication date May 29, 2014
- LSI Corporation
- Mark F. Turner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD FOR DECREASING SIGNAL INTEGRITY NOISE BY USING VA...
- Publication number 20130249591
- Publication date Sep 26, 2013
- LSI Corporation
- Jay D. Harker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF GENERATING A RESTRICTED INLINE RESISTIVE FAULT PATTERN AN...
- Publication number 20100153056
- Publication date Jun 17, 2010
- LSI Corporation
- Jeff S. Brown
- G01 - MEASURING TESTING
Information Patent Application
TESTABLE TRISTATE BUS KEEPER
- Publication number 20100007371
- Publication date Jan 14, 2010
- LSI Corporation
- Jeffrey S. Brown
- G01 - MEASURING TESTING