Marion G. Porter

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for testing the operation of a central process...
- Patent number 4,933,941
- Issue date Jun 12, 1990
- Honeywell Bull Inc.
- Clinton B. Eckard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for forcing a reload from main memory upon cache memory e...
- Patent number 4,831,622
- Issue date May 16, 1989
- Honeywell Bull Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for a data processing unit sharing a plurality...
- Patent number 4,530,052
- Issue date Jul 16, 1985
- Honeywell Information Systems Inc.
- James L. King
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split-cycle cache system with SCU controlled cache clearing during...
- Patent number 4,525,777
- Issue date Jun 25, 1985
- Honeywell Information Systems Inc.
- Marvin K. Webster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for an operating system supervisor in a data p...
- Patent number 4,493,034
- Issue date Jan 8, 1985
- Honeywell Information Systems Inc.
- Phillip A. Angelle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for cache clearing
- Patent number 4,471,429
- Issue date Sep 11, 1984
- Honeywell Information Systems, Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache unit information replacement apparatus
- Patent number 4,314,331
- Issue date Feb 2, 1982
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache apparatus for enabling overlap of instruction fetch operations
- Patent number 4,313,158
- Issue date Jan 26, 1982
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction buffer apparatus of a cache unit
- Patent number 4,312,036
- Issue date Jan 19, 1982
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache unit bypass apparatus
- Patent number 4,268,907
- Issue date May 19, 1981
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache arrangement utilizing a split cycle mode of operation
- Patent number 4,245,304
- Issue date Jan 13, 1981
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command queue apparatus included within a cache unit for facilitati...
- Patent number 4,225,922
- Issue date Sep 30, 1980
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache unit with transit block buffer apparatus
- Patent number 4,217,640
- Issue date Aug 12, 1980
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache arrangement for performing simultaneous read/write operations
- Patent number 4,208,716
- Issue date Jun 17, 1980
- Honeywell Information Systems Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access system
- Patent number 4,124,891
- Issue date Nov 7, 1978
- Honeywell Information Systems Inc.
- Edward F. Weller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction look ahead having prefetch concurrency and pipeline fea...
- Patent number 4,110,822
- Issue date Aug 29, 1978
- Honeywell Information Systems, Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output processing system utilizing locked processors
- Patent number 4,099,234
- Issue date Jul 4, 1978
- Honeywell Information Systems Inc.
- John M. Woods
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output maintenance access apparatus
- Patent number 4,091,455
- Issue date May 23, 1978
- Honeywell Information Systems Inc.
- John M. Woods
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fail soft memory
- Patent number 4,010,450
- Issue date Mar 1, 1977
- Honeywell Information Systems, Inc.
- Marion G. Porter
- G11 - INFORMATION STORAGE
Information Patent Grant
Pathfinder microprogram control system
- Patent number 4,001,788
- Issue date Jan 4, 1977
- Honeywell Information Systems, Inc.
- Garvin Wesley Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for input-output processing system
- Patent number 3,976,977
- Issue date Aug 24, 1976
- Honeywell Information Systems, Inc.
- Marion G. Porter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating addresses to a paged memory
- Patent number 3,976,978
- Issue date Aug 24, 1976
- Honeywell Information Systems, Inc.
- Garvin Wesley Patterson
- G06 - COMPUTING CALCULATING COUNTING

Marion G. Porter

Person

Patents Grantslast 30 patents

Apparatus and method for testing the operation of a central process...

Apparatus for forcing a reload from main memory upon cache memory e...

Apparatus and method for a data processing unit sharing a plurality...

Split-cycle cache system with SCU controlled cache clearing during...

Apparatus and method for an operating system supervisor in a data p...

Apparatus for cache clearing

Cache unit information replacement apparatus

Cache apparatus for enabling overlap of instruction fetch operations

Instruction buffer apparatus of a cache unit

Cache unit bypass apparatus

Cache arrangement utilizing a split cycle mode of operation

Command queue apparatus included within a cache unit for facilitati...

Cache unit with transit block buffer apparatus

Cache arrangement for performing simultaneous read/write operations

Memory access system

Instruction look ahead having prefetch concurrency and pipeline fea...

Input/output processing system utilizing locked processors

Input/output maintenance access apparatus

Fail soft memory

Pathfinder microprogram control system

Processor for input-output processing system

Method of generating addresses to a paged memory