Marius Aurel Bodea

Person

Villach, AT

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming a semiconductor device
- Patent number 11,217,529
- Issue date Jan 4, 2022
- Infineon Technologies AG
- Stefan Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress relieving structure for semiconductor device
- Patent number 10,896,887
- Issue date Jan 19, 2021
- Infineon Technologies AG
- Marius Aurel Bodea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for dual-region singulation
- Patent number 10,090,215
- Issue date Oct 2, 2018
- Infineon Technologies Austria AG
- Andrew Christopher Graeme Wood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for dual-region singulation
- Patent number 9,583,406
- Issue date Feb 28, 2017
- Infineon Technologies Austria AG
- Andrew Christopher Graeme Wood
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240363502
- Publication date Oct 31, 2024
- Infineon Technlolgies AG
- Stefan Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC CIRCUIT WITH A TRANSISTOR DEVICE AND A CLAMP CIRCUIT AND...
- Publication number 20240072785
- Publication date Feb 29, 2024
- Infineon Technologies Austria AG
- Adrian Finney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE
- Publication number 20200111750
- Publication date Apr 9, 2020
- INFINEON TECHNOLOGIES AG
- Stefan Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stress Relieving Structure for Semiconductor Device
- Publication number 20190348382
- Publication date Nov 14, 2019
- Marius Aurel Bodea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device with Stress Relieving Structure
- Publication number 20190348373
- Publication date Nov 14, 2019
- INFINEON TECHNOLOGIES AG
- Marius Aurel Bodea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor Device with Trench Edge Termination
- Publication number 20190043982
- Publication date Feb 7, 2019
- INFINEON TECHNOLOGIES AG
- Adrian Finney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method for Dual-Region Singulation
- Publication number 20170125315
- Publication date May 4, 2017
- Infineon Technologies Austria AG
- Andrew Christopher Graeme Wood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Dual-Region Singulation
- Publication number 20160276233
- Publication date Sep 22, 2016
- Infineon Technologies Austria AG
- Andrew Christopher Graeme Wood
- G06 - COMPUTING CALCULATING COUNTING

Marius Aurel Bodea

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming a semiconductor device

Stress relieving structure for semiconductor device

System and method for dual-region singulation

System and method for dual-region singulation

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE

ELECTRONIC CIRCUIT WITH A TRANSISTOR DEVICE AND A CLAMP CIRCUIT AND...

SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE

Stress Relieving Structure for Semiconductor Device

Semiconductor Device with Stress Relieving Structure

Transistor Device with Trench Edge Termination

System and Method for Dual-Region Singulation

System and Method for Dual-Region Singulation