Marius Orlowski

Person

Auatin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Transistors with immersed contacts
- Patent number 8,633,515
- Issue date Jan 21, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors with immersed contacts
- Patent number 8,314,448
- Issue date Nov 20, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single transistor memory cell with reduced recombination rates
- Patent number 7,986,006
- Issue date Jul 26, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with immersed contacts and methods of forming thereof
- Patent number 7,968,394
- Issue date Jun 28, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming an electronic device including a fin-type trans...
- Patent number 7,939,412
- Issue date May 10, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of forming an electronic device including a layer of discon...
- Patent number 7,932,189
- Issue date Apr 26, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Tushar P. Merchant
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Transistor devices with nano-crystal gate structures
- Patent number 7,928,502
- Issue date Apr 19, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Chun-Li Liu
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method and apparatus for mobility enhancement in a semiconductor de...
- Patent number 7,872,311
- Issue date Jan 18, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to control the gate sidewall profile by graded material comp...
- Patent number 7,811,891
- Issue date Oct 12, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device structure
- Patent number 7,781,840
- Issue date Aug 24, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Ted R. White
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Laterally grown nanotubes and method of formation
- Patent number 7,772,584
- Issue date Aug 10, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device including a fin-type transistor structure and a p...
- Patent number 7,723,805
- Issue date May 25, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS device with nano-crystal gate structure
- Patent number 7,700,438
- Issue date Apr 20, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Chun-Li Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS devices with multi-layer gate stack
- Patent number 7,683,443
- Issue date Mar 23, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Chun-Li Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a semiconductor device and structure thereof
- Patent number 7,629,220
- Issue date Dec 8, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marius Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-channel transistor structure and method of making thereof
- Patent number 7,608,893
- Issue date Oct 27, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marius Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming semiconductor device having nanotube structures
- Patent number 7,592,248
- Issue date Sep 22, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Peter L. G. Ventzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable fuse with silicon germanium
- Patent number 7,575,958
- Issue date Aug 18, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Alexander B. Hoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffusion barrier for nickel silicides in a semiconductor fabricati...
- Patent number 7,544,576
- Issue date Jun 9, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Dharmesh Jawarani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Charge storage structure formation in transistor with vertical chan...
- Patent number 7,535,060
- Issue date May 19, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single transistor memory cell with reduced recombination rates
- Patent number 7,517,741
- Issue date Apr 14, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS device with multi-layer gate stack
- Patent number 7,510,956
- Issue date Mar 31, 2009
- Fressscale Semiconductor, Inc.
- Chun-Li Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming an electronic device including semiconductor fins
- Patent number 7,456,055
- Issue date Nov 25, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor process for forming stress absorbent shallow trench i...
- Patent number 7,442,621
- Issue date Oct 28, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a semiconductor device having a fin and structur...
- Patent number 7,442,590
- Issue date Oct 28, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual surface SOI by lateral epitaxial overgrowth
- Patent number 7,435,639
- Issue date Oct 14, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Brian A. Winstead
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming an electronic device
- Patent number 7,402,476
- Issue date Jul 22, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Laterally grown nanotubes and method of formation
- Patent number 7,371,677
- Issue date May 13, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a multi-bit non-volatile memory (NVM) cell and str...
- Patent number 7,364,970
- Issue date Apr 29, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-channel transistor structure and method of making thereof
- Patent number 7,354,831
- Issue date Apr 8, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TRANSISTORS WITH IMMERSED CONTACTS
- Publication number 20130009222
- Publication date Jan 10, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. ORLOWSKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH IMMERSED CONTACTS
- Publication number 20110210395
- Publication date Sep 1, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. ORLOWSKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE INCLUDING A FIN-TYPE TRANSISTOR STRUCTURE AND A P...
- Publication number 20100190308
- Publication date Jul 29, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. ORLOWSKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR DEVICES WITH NANO-CRYSTAL GATE STRUCTURES
- Publication number 20100155825
- Publication date Jun 24, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Chun-Li Liu
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
- Publication number 20100044762
- Publication date Feb 25, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marius Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE TRANSISTOR MEMORY CELL WITH REDUCED RECOMBINATION RATES
- Publication number 20090166700
- Publication date Jul 2, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. ORLOWSKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING NANOTUBE STRUCTURES
- Publication number 20090142934
- Publication date Jun 4, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Peter L.G. Ventzek
- B82 - NANO-TECHNOLOGY
Information Patent Application
MOS DEVICES WITH MULTI-LAYER GATE STACK
- Publication number 20090115001
- Publication date May 7, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Chun-Li Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LATERALLY GROWN NANOTUBES AND METHOD OF FORMATION
- Publication number 20080211102
- Publication date Sep 4, 2008
- Freescale Semiconductor Inc.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE INCLUDING A LAYER OF DISCONTINUOUS STORAGE ELEMEN...
- Publication number 20080182428
- Publication date Jul 31, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Tushar P. Merchant
- B82 - NANO-TECHNOLOGY
Information Patent Application
MULTI-CHANNEL TRANSISTOR STRUCTURE AND METHOD OF MAKING THEREOF
- Publication number 20080142853
- Publication date Jun 19, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius Orlowski
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD AND APPARATUS FOR MOBILITY ENHANCEMENT IN A SEMICONDUCTOR DE...
- Publication number 20080006880
- Publication date Jan 10, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
- Publication number 20080003725
- Publication date Jan 3, 2008
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual surface SOI by lateral epitaxial overgrowth
- Publication number 20070281446
- Publication date Dec 6, 2007
- Brian A. Winstead
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A FIN AN STRUCTURE...
- Publication number 20070254435
- Publication date Nov 1, 2007
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR
- Publication number 20070235807
- Publication date Oct 11, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Ted R. White
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Laterally grown nanotubes and method of formation
- Publication number 20070231946
- Publication date Oct 4, 2007
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING A GATE WITH A THIN CONDUCTIVE LAYER
- Publication number 20070218640
- Publication date Sep 20, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Sinan Goktepeli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic device including a semiconductor fin and a process for f...
- Publication number 20070218628
- Publication date Sep 20, 2007
- Freescale Semiconductor, Inc.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a multibit transistor
- Publication number 20070212832
- Publication date Sep 13, 2007
- Freescale Semiconductor Inc.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Charge storage structure formation in transistor with vertical chan...
- Publication number 20070210338
- Publication date Sep 13, 2007
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS device with nano-crystal gate structure
- Publication number 20070176227
- Publication date Aug 2, 2007
- Chun-Li Liu
- B82 - NANO-TECHNOLOGY
Information Patent Application
MOS device with multi-layer gate stack
- Publication number 20070176247
- Publication date Aug 2, 2007
- Chun-Li Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing two gates controlling the same channel
- Publication number 20070173024
- Publication date Jul 26, 2007
- Sinan Goktepeli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to control the gate sidewall profile by graded material comp...
- Publication number 20070166902
- Publication date Jul 19, 2007
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor with immersed contacts and methods of forming thereof
- Publication number 20070161170
- Publication date Jul 12, 2007
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic device including a fin-type transistor structure and a p...
- Publication number 20070158764
- Publication date Jul 12, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOSFET dielectric including a diffusion barrier
- Publication number 20070096226
- Publication date May 3, 2007
- Chun-Li Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Programmable fuse with silicon germanium
- Publication number 20070082431
- Publication date Apr 12, 2007
- Alexander B. Hoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making a multi-bit nov-volatile memory (NYM) cell and str...
- Publication number 20070077706
- Publication date Apr 5, 2007
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS

Marius Orlowski

Person

Patents Grantslast 30 patents

Transistors with immersed contacts

Transistors with immersed contacts

Single transistor memory cell with reduced recombination rates

Transistor with immersed contacts and methods of forming thereof

Process for forming an electronic device including a fin-type trans...

Process of forming an electronic device including a layer of discon...

Transistor devices with nano-crystal gate structures

Method and apparatus for mobility enhancement in a semiconductor de...

Method to control the gate sidewall profile by graded material comp...

Semiconductor device structure

Laterally grown nanotubes and method of formation

Electronic device including a fin-type transistor structure and a p...

MOS device with nano-crystal gate structure

MOS devices with multi-layer gate stack

Method for forming a semiconductor device and structure thereof

Multi-channel transistor structure and method of making thereof

Method of forming semiconductor device having nanotube structures

Programmable fuse with silicon germanium

Diffusion barrier for nickel silicides in a semiconductor fabricati...

Charge storage structure formation in transistor with vertical chan...

Single transistor memory cell with reduced recombination rates

MOS device with multi-layer gate stack

Process for forming an electronic device including semiconductor fins

Semiconductor process for forming stress absorbent shallow trench i...

Method for forming a semiconductor device having a fin and structur...

Dual surface SOI by lateral epitaxial overgrowth

Method for forming an electronic device

Laterally grown nanotubes and method of formation

Method of making a multi-bit non-volatile memory (NVM) cell and str...

Multi-channel transistor structure and method of making thereof

Patents Applicationslast 30 patents

TRANSISTORS WITH IMMERSED CONTACTS

TRANSISTORS WITH IMMERSED CONTACTS

ELECTRONIC DEVICE INCLUDING A FIN-TYPE TRANSISTOR STRUCTURE AND A P...

TRANSISTOR DEVICES WITH NANO-CRYSTAL GATE STRUCTURES

METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF

SINGLE TRANSISTOR MEMORY CELL WITH REDUCED RECOMBINATION RATES

METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING NANOTUBE STRUCTURES

MOS DEVICES WITH MULTI-LAYER GATE STACK

LATERALLY GROWN NANOTUBES AND METHOD OF FORMATION

ELECTRONIC DEVICE INCLUDING A LAYER OF DISCONTINUOUS STORAGE ELEMEN...

MULTI-CHANNEL TRANSISTOR STRUCTURE AND METHOD OF MAKING THEREOF

METHOD AND APPARATUS FOR MOBILITY ENHANCEMENT IN A SEMICONDUCTOR DE...

METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF

Dual surface SOI by lateral epitaxial overgrowth

METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A FIN AN STRUCTURE...

SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR

Laterally grown nanotubes and method of formation

SEMICONDUCTOR DEVICE HAVING A GATE WITH A THIN CONDUCTIVE LAYER

Electronic device including a semiconductor fin and a process for f...

Method for making a multibit transistor

Charge storage structure formation in transistor with vertical chan...

MOS device with nano-crystal gate structure

MOS device with multi-layer gate stack

Method for producing two gates controlling the same channel

Method to control the gate sidewall profile by graded material comp...

Transistor with immersed contacts and methods of forming thereof

Electronic device including a fin-type transistor structure and a p...

MOSFET dielectric including a diffusion barrier

Programmable fuse with silicon germanium

Method of making a multi-bit nov-volatile memory (NYM) cell and str...