Mark Brandon Fuselier

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
SOI semiconductor device having enhanced, self-aligned dielectric r...
- Patent number 7,544,999
- Issue date Jun 9, 2009
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors with controllable threshold voltages, and various metho...
- Patent number 7,432,136
- Issue date Oct 7, 2008
- Advanced Micro Devices, Inc.
- Mark B. Fuselier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming doped regions in the bulk substrate of an SOI sub...
- Patent number 7,335,568
- Issue date Feb 26, 2008
- Advanced Micro Devices, Inc.
- Derick J. Wristers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Biased, triple-well fully depleted SOI structure
- Patent number 7,180,136
- Issue date Feb 20, 2007
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bi-modal halo implantation
- Patent number 7,176,095
- Issue date Feb 13, 2007
- Advanced Micro Devices, Inc.
- Akif Sultan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming doped regions in the bulk substrate of an SOI sub...
- Patent number 7,129,142
- Issue date Oct 31, 2006
- Advanced Micro Devices, Inc.
- Derick J. Wristers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Biased, triple-well fully depleted SOI structure, and various metho...
- Patent number 6,919,236
- Issue date Jul 19, 2005
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an SOI semiconductor device having enhanced, self-...
- Patent number 6,884,702
- Issue date Apr 26, 2005
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully-depleted SOI device
- Patent number 6,876,037
- Issue date Apr 5, 2005
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor component and method of manufacture
- Patent number 6,806,111
- Issue date Oct 19, 2004
- Advanced Micro Devices, Inc.
- Edward E. Ehrichs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for asymmetric spacer formation
- Patent number 6,794,256
- Issue date Sep 21, 2004
- Advanced Micro Devices Inc.
- Mark B. Fuselier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Doping methods for fully-depleted SOI structures, and device compri...
- Patent number 6,780,686
- Issue date Aug 24, 2004
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device formed over a multiple thickness buried oxide...
- Patent number 6,737,332
- Issue date May 18, 2004
- Advanced Micro Devices, Inc.
- Mark B. Fuselier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Doped spacer liner for improved transistor performance
- Patent number 6,583,016
- Issue date Jun 24, 2003
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for electrically measuring insulating film thi...
- Patent number 6,570,228
- Issue date May 27, 2003
- Advanced Micro Devices, Inc.
- Mark Brandon Fuselier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for verifying process integrity
- Patent number 6,463,570
- Issue date Oct 8, 2002
- Advanced Micro Devices
- Michael J. Dunn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of analyzing the effects of shadowing of angled halo implants
- Patent number 6,426,262
- Issue date Jul 30, 2002
- Advanced Micro Devices, Inc.
- Mark Brandon Fuselier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Detecting die speed variations
- Patent number 6,410,350
- Issue date Jun 25, 2002
- Advanced Micro Devices
- Mark Brandon Fuselier
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrically quantifying transistor spacer width
- Patent number 6,287,877
- Issue date Sep 11, 2001
- Advanced Micro Devices
- Roger Williams
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FORMING DOPED REGIONS IN THE BULK SUBSTRATE OF AN SOI SUB...
- Publication number 20070015322
- Publication date Jan 18, 2007
- Advanced Micro Devices, Inc.
- Derick J. Wristers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Biased, triple-well fully depleted SOI structure
- Publication number 20050184341
- Publication date Aug 25, 2005
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI semiconductor device having enhanced, self-aligned dielectric r...
- Publication number 20050151133
- Publication date Jul 14, 2005
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device formed over a multiple thickness buried oxide...
- Publication number 20040219761
- Publication date Nov 4, 2004
- Advanced Micro Devices, Inc.
- Mark B. Fuselier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Doping methods for fully-depleted SOI structures, and device compri...
- Publication number 20040169227
- Publication date Sep 2, 2004
- Advanced Micro Devices, Inc.
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming doped regions in the bulk substrate of an SOI sub...
- Publication number 20030228722
- Publication date Dec 11, 2003
- Derick J. Wristers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making an soi semiconductor device having enhanced, self-...
- Publication number 20030223258
- Publication date Dec 4, 2003
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistors with controllable threshold voltages, and various metho...
- Publication number 20030207504
- Publication date Nov 6, 2003
- Mark B. Fuselier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOPING METHODS FOR FULLY-DEPLETED SOI STRUCTURES, AND DEVICE COMPRI...
- Publication number 20030178678
- Publication date Sep 25, 2003
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Biased, triple-well fully depleted SOI structure, and various metho...
- Publication number 20030178622
- Publication date Sep 25, 2003
- Andy C. Wei
- H01 - BASIC ELECTRIC ELEMENTS

Mark Brandon Fuselier

Person

Patents Grantslast 30 patents

SOI semiconductor device having enhanced, self-aligned dielectric r...

Transistors with controllable threshold voltages, and various metho...

Method of forming doped regions in the bulk substrate of an SOI sub...

Biased, triple-well fully depleted SOI structure

Bi-modal halo implantation

Method of forming doped regions in the bulk substrate of an SOI sub...

Biased, triple-well fully depleted SOI structure, and various metho...

Method of making an SOI semiconductor device having enhanced, self-...

Fully-depleted SOI device

Semiconductor component and method of manufacture

Method for asymmetric spacer formation

Doping methods for fully-depleted SOI structures, and device compri...

Semiconductor device formed over a multiple thickness buried oxide...

Doped spacer liner for improved transistor performance

Method and apparatus for electrically measuring insulating film thi...

Apparatus and method for verifying process integrity

Method of analyzing the effects of shadowing of angled halo implants

Detecting die speed variations

Electrically quantifying transistor spacer width

Patents Applicationslast 30 patents

METHOD OF FORMING DOPED REGIONS IN THE BULK SUBSTRATE OF AN SOI SUB...

Biased, triple-well fully depleted SOI structure

SOI semiconductor device having enhanced, self-aligned dielectric r...

Semiconductor device formed over a multiple thickness buried oxide...

Doping methods for fully-depleted SOI structures, and device compri...

Method of forming doped regions in the bulk substrate of an SOI sub...

Method of making an soi semiconductor device having enhanced, self-...

Transistors with controllable threshold voltages, and various metho...

DOPING METHODS FOR FULLY-DEPLETED SOI STRUCTURES, AND DEVICE COMPRI...

Biased, triple-well fully depleted SOI structure, and various metho...