Mark D. Aubel

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Essex Junction, VT, US

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Patents Grantslast 30 patents

Information Patent Grant
Boundary latch and logic placement to satisfy timing constraints
- Patent number 9,098,669
- Issue date Aug 4, 2015
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system allowing for semiconductor design rule optimization
- Patent number 8,839,177
- Issue date Sep 16, 2014
- International Business Machines Corporation
- Mark D. Aubel
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BOUNDARY LATCH AND LOGIC PLACEMENT TO SATISFY TIMING CONSTRAINTS
- Publication number 20150199465
- Publication date Jul 16, 2015
- International Business Machines Corporation
- Charles J. Alpert
- G06 - COMPUTING CALCULATING COUNTING