Mark J. Jander

Person

Colorado Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Control logic design to support USB cache offload
- Patent number 9,286,203
- Issue date Mar 15, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Moby J. Abraham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage system with boot appliance for improving reliability/availa...
- Patent number 8,904,158
- Issue date Dec 2, 2014
- LSI Corporation
- Gregory L. Huff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing precise circuit delays
- Patent number 6,243,784
- Issue date Jun 5, 2001
- LSI Logic Corporation
- Michael B. Anderson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for address translation in bus bridge devices
- Patent number 6,189,062
- Issue date Feb 13, 2001
- LSI Logic Corporation
- Mark J. Jander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing precise circuit delays
- Patent number 6,115,769
- Issue date Sep 5, 2000
- LSI Logic Corporation
- Michael B. Anderson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated single chip dual mode raid controller
- Patent number 6,065,096
- Issue date May 16, 2000
- LSI Logic Corporation
- Brian A. Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
N-deep fixed latency fall-through FIFO architecture
- Patent number 5,956,492
- Issue date Sep 21, 1999
- LSI Logic Corporation
- Mark J. Jander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for address translation in bus bridge devices
- Patent number 5,857,080
- Issue date Jan 5, 1999
- LSI Logic Corporation
- Mark J. Jander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CMOS driver for fast single-ended bus
- Patent number 5,576,640
- Issue date Nov 19, 1996
- AT&T Global Information Solutions Company
- Raymond F. Emnett
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
CONTROL LOGIC DESIGN TO SUPPORT USB CACHE OFFLOAD
- Publication number 20140195718
- Publication date Jul 10, 2014
- LSI Corporation
- Moby J. Abraham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CONSOLIDATING BOOT DRIVES AND IMPROVING RE...
- Publication number 20130061029
- Publication date Mar 7, 2013
- LSI Corporation
- Gregory L. Huff
- G06 - COMPUTING CALCULATING COUNTING

Mark J. Jander

Person

Patents Grantslast 30 patents

Control logic design to support USB cache offload

Storage system with boot appliance for improving reliability/availa...

Method and apparatus for providing precise circuit delays

Apparatus and method for address translation in bus bridge devices

Method and apparatus for providing precise circuit delays

Integrated single chip dual mode raid controller

N-deep fixed latency fall-through FIFO architecture

Apparatus and method for address translation in bus bridge devices

CMOS driver for fast single-ended bus

Patents Applicationslast 30 patents

CONTROL LOGIC DESIGN TO SUPPORT USB CACHE OFFLOAD

METHOD AND APPARATUS FOR CONSOLIDATING BOOT DRIVES AND IMPROVING RE...