Mark J. Liu

Person

West Linn, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuits with recessed gate electrodes
- Patent number 12,165,928
- Issue date Dec 10, 2024
- Intel Corporation
- Srijit Mukherjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual self-aligned gate endcap (SAGE) architectures
- Patent number 11,688,792
- Issue date Jun 27, 2023
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffused tip extension transistor
- Patent number 11,664,452
- Issue date May 30, 2023
- Intel Corporation
- Pratik A. Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Unidirectional self-aligned gate endcap (SAGE) architectures with g...
- Patent number 11,605,632
- Issue date Mar 14, 2023
- Intel Corporation
- Walid M. Hafez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors with high concentration of germanium
- Patent number 11,387,320
- Issue date Jul 12, 2022
- Intel Corporation
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Unidirectional self-aligned gate endcap (SAGE) architectures with g...
- Patent number 11,217,582
- Issue date Jan 4, 2022
- Intel Corporation
- Walid M. Hafez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual self-aligned gate endcap (SAGE) architectures
- Patent number 11,205,708
- Issue date Dec 21, 2021
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with recessed gate electrodes
- Patent number 11,183,432
- Issue date Nov 23, 2021
- Intel Corporation
- Srijit Mukherjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffused tip extension transistor
- Patent number 10,872,977
- Issue date Dec 22, 2020
- Intel Corporation
- Pratik A. Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with recessed gate electrodes
- Patent number 10,651,093
- Issue date May 12, 2020
- Intel Corporation
- Srijit Mukherjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffused tip extension transistor
- Patent number 10,304,956
- Issue date May 28, 2019
- Intel Corporation
- Pratik A. Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed laser anneal process for transistor with partial melt of a r...
- Patent number 10,170,314
- Issue date Jan 1, 2019
- Intel Corporation
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 10,084,087
- Issue date Sep 25, 2018
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with recessed gate electrodes
- Patent number 10,020,232
- Issue date Jul 10, 2018
- Intel Corporation
- Srijit Mukherjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 9,660,078
- Issue date May 23, 2017
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors with high concentration of boron doped germanium
- Patent number 9,627,384
- Issue date Apr 18, 2017
- Intel Corporation
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed laser anneal process for transistors with partial melt of a...
- Patent number 9,443,980
- Issue date Sep 13, 2016
- Intel Corporation
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with selective gate electrode recess
- Patent number 9,418,898
- Issue date Aug 16, 2016
- Intel Corporation
- Srijit Mukherjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming superactive deactivation-resistant junction with...
- Patent number 9,240,322
- Issue date Jan 19, 2016
- Intel Corporation
- Jacob M. Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 9,231,076
- Issue date Jan 5, 2016
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective laser annealing process for buried regions in a MOS device
- Patent number 9,196,704
- Issue date Nov 24, 2015
- Intel Corporation
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 9,076,814
- Issue date Jul 7, 2015
- Intel Corporation
- Cory Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed laser anneal process for transistors with partial melt of a...
- Patent number 9,006,069
- Issue date Apr 14, 2015
- Intel Corporation
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors with high concentration of boron doped germanium
- Patent number 8,901,537
- Issue date Dec 2, 2014
- Intel Corporation
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with selective gate electrode recess
- Patent number 8,896,030
- Issue date Nov 25, 2014
- Intel Corporation
- Srijit Mukherjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced dislocation stress transistor
- Patent number 8,779,477
- Issue date Jul 15, 2014
- Intel Corporation
- Cory Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a multilayer capping film to minimize differenti...
- Patent number 7,767,509
- Issue date Aug 3, 2010
- Intel Corporation
- Mark Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Highly-selective metal etchants
- Patent number 7,741,230
- Issue date Jun 22, 2010
- Intel Corporation
- Willy Rachmady
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
CMOS device and method of manufacturing same
- Patent number 7,663,192
- Issue date Feb 16, 2010
- Intel Corporation
- Bernhard Sell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming ultra-shallow junctions
- Patent number 7,456,068
- Issue date Nov 25, 2008
- Intel Corporation
- Jack T. Kavalieros
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUITS WITH RECESSED GATE ELECTRODES
- Publication number 20240347394
- Publication date Oct 17, 2024
- Intel Corporation
- Srijit MUKHERJEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSED TIP EXTENSION TRANSISTOR
- Publication number 20230253499
- Publication date Aug 10, 2023
- Intel Corporation
- Pratik A. PATEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES
- Publication number 20220077302
- Publication date Mar 10, 2022
- Intel Corporation
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...
- Publication number 20220077145
- Publication date Mar 10, 2022
- Intel Corporation
- Walid M. HAFEZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH RECESSED GATE ELECTRODES
- Publication number 20220044971
- Publication date Feb 10, 2022
- Intel Corporation
- Srijit MUKHERJEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSED TIP EXTENSION TRANSISTOR
- Publication number 20210050448
- Publication date Feb 18, 2021
- Intel Corporation
- Pratik A. PATEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH RECESSED GATE ELECTRODES
- Publication number 20200235014
- Publication date Jul 23, 2020
- Intel Corporation
- Srijit MUKHERJEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH HIGH CONCENTRATION OF GERMANIUM
- Publication number 20200144362
- Publication date May 7, 2020
- Intel Corporation
- ANAND S. MURTHY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES
- Publication number 20190305112
- Publication date Oct 3, 2019
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...
- Publication number 20190304971
- Publication date Oct 3, 2019
- Intel Corporation
- Walid M. HAFEZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSED TIP EXTENSION TRANSISTOR
- Publication number 20190245088
- Publication date Aug 8, 2019
- Intel Corporation
- Pratik A. PATEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH SELECTIVE GATE ELECTRODE RECESS
- Publication number 20190035690
- Publication date Jan 31, 2019
- Intel Corporation
- Srijit MUKHERJEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH HIGH CONCENTRATION OF BORON DOPED GERMANIUM
- Publication number 20170221724
- Publication date Aug 3, 2017
- Intel Corporation
- ANAND S. MURTHY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20170222052
- Publication date Aug 3, 2017
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSED TIP EXTENSION TRANSISTOR
- Publication number 20160380102
- Publication date Dec 29, 2016
- Intel Corporation
- Pratik A. PATEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PULSED LASER ANNEAL PROCESS FOR TRANSISTOR WITH PARTIAL MELT OF A R...
- Publication number 20160372599
- Publication date Dec 22, 2016
- Intel Corporation
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH SELETIVE GATE ELECTRODE RECESS
- Publication number 20160372377
- Publication date Dec 22, 2016
- Intel Corporation
- Srijit MUKHERJEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20160079423
- Publication date Mar 17, 2016
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PULSED LASER ANNEAL PROCESS FOR TRANSISTORS WITH PARTIAL MELT OF A...
- Publication number 20150200301
- Publication date Jul 16, 2015
- Intel Corporation
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20150155384
- Publication date Jun 4, 2015
- Intel Corporation
- Cory E. Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH SELECTIVE GATE ELECTRODE RECESS
- Publication number 20150079776
- Publication date Mar 19, 2015
- Intel Corporation
- Srijit MUKHERJEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH HIGH CONCENTRATION OF BORON DOPED GERMANIUM
- Publication number 20150060945
- Publication date Mar 5, 2015
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20140284626
- Publication date Sep 25, 2014
- Cory Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH SELECTIVE GATE ELECTRODE RECESS
- Publication number 20140070320
- Publication date Mar 13, 2014
- Srijit Mukherjee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE LASER ANNEALING PROCESS FOR BURIED REGIONS IN A MOS DEVICE
- Publication number 20130288438
- Publication date Oct 31, 2013
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PULSED LASER ANNEAL PROCESS FOR TRANSISTORS WITH PARTIAL MELT OF A...
- Publication number 20130285129
- Publication date Oct 31, 2013
- Jacob Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SUPERACTIVE DEACTIVATION-RESISTANT JUNCTION WITH...
- Publication number 20130267084
- Publication date Oct 10, 2013
- Jacob M. Jensen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH HIGH CONCENTRATION OF BORON DOPED GERMANIUM
- Publication number 20120153387
- Publication date Jun 21, 2012
- Anand S. Murthy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED DISLOCATION STRESS TRANSISTOR
- Publication number 20100038685
- Publication date Feb 18, 2010
- Cory Weber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS DEVICE AND METHOD OF MANUFACTURING SAME
- Publication number 20090321838
- Publication date Dec 31, 2009
- Bernhard Sell
- H01 - BASIC ELECTRIC ELEMENTS

Mark J. Liu

Person

Patents Grantslast 30 patents

Integrated circuits with recessed gate electrodes

Dual self-aligned gate endcap (SAGE) architectures

Diffused tip extension transistor

Unidirectional self-aligned gate endcap (SAGE) architectures with g...

Transistors with high concentration of germanium

Unidirectional self-aligned gate endcap (SAGE) architectures with g...

Dual self-aligned gate endcap (SAGE) architectures

Integrated circuits with recessed gate electrodes

Diffused tip extension transistor

Integrated circuits with recessed gate electrodes

Diffused tip extension transistor

Pulsed laser anneal process for transistor with partial melt of a r...

Enhanced dislocation stress transistor

Integrated circuits with recessed gate electrodes

Enhanced dislocation stress transistor

Transistors with high concentration of boron doped germanium

Pulsed laser anneal process for transistors with partial melt of a...

Integrated circuits with selective gate electrode recess

Method for forming superactive deactivation-resistant junction with...

Enhanced dislocation stress transistor

Selective laser annealing process for buried regions in a MOS device

Enhanced dislocation stress transistor

Pulsed laser anneal process for transistors with partial melt of a...

Transistors with high concentration of boron doped germanium

Integrated circuits with selective gate electrode recess

Enhanced dislocation stress transistor

Methods of forming a multilayer capping film to minimize differenti...

Highly-selective metal etchants

CMOS device and method of manufacturing same

Forming ultra-shallow junctions

Patents Applicationslast 30 patents

INTEGRATED CIRCUITS WITH RECESSED GATE ELECTRODES

DIFFUSED TIP EXTENSION TRANSISTOR

DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES

UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...

INTEGRATED CIRCUITS WITH RECESSED GATE ELECTRODES

DIFFUSED TIP EXTENSION TRANSISTOR

INTEGRATED CIRCUITS WITH RECESSED GATE ELECTRODES

TRANSISTORS WITH HIGH CONCENTRATION OF GERMANIUM

DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES

UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...

DIFFUSED TIP EXTENSION TRANSISTOR

INTEGRATED CIRCUITS WITH SELECTIVE GATE ELECTRODE RECESS

TRANSISTORS WITH HIGH CONCENTRATION OF BORON DOPED GERMANIUM

ENHANCED DISLOCATION STRESS TRANSISTOR

DIFFUSED TIP EXTENSION TRANSISTOR

PULSED LASER ANNEAL PROCESS FOR TRANSISTOR WITH PARTIAL MELT OF A R...

INTEGRATED CIRCUITS WITH SELETIVE GATE ELECTRODE RECESS

ENHANCED DISLOCATION STRESS TRANSISTOR

PULSED LASER ANNEAL PROCESS FOR TRANSISTORS WITH PARTIAL MELT OF A...

ENHANCED DISLOCATION STRESS TRANSISTOR

INTEGRATED CIRCUITS WITH SELECTIVE GATE ELECTRODE RECESS

TRANSISTORS WITH HIGH CONCENTRATION OF BORON DOPED GERMANIUM

ENHANCED DISLOCATION STRESS TRANSISTOR

INTEGRATED CIRCUITS WITH SELECTIVE GATE ELECTRODE RECESS

SELECTIVE LASER ANNEALING PROCESS FOR BURIED REGIONS IN A MOS DEVICE

PULSED LASER ANNEAL PROCESS FOR TRANSISTORS WITH PARTIAL MELT OF A...

METHOD FOR FORMING SUPERACTIVE DEACTIVATION-RESISTANT JUNCTION WITH...

TRANSISTORS WITH HIGH CONCENTRATION OF BORON DOPED GERMANIUM

ENHANCED DISLOCATION STRESS TRANSISTOR

CMOS DEVICE AND METHOD OF MANUFACTURING SAME