Mark Palmer

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Functional pathway configuration at a system/IC interface
- Patent number 7,106,101
- Issue date Sep 12, 2006
- Microchip Technology Inc.
- Mark Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods forming an integrated circuit package with a split cavity wall
- Patent number 7,020,958
- Issue date Apr 4, 2006
- Intel Corporation
- Elissa E. Carapella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable identification in a communications controller
- Patent number 6,810,435
- Issue date Oct 26, 2004
- Microchip Technology Incorporated
- Mark Palmer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Split cavity wall plating for an integrated circuit package
- Patent number 6,153,829
- Issue date Nov 28, 2000
- Intel Corporation
- Elissa E. Carapella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with a heat spreader coupled to a pair o...
- Patent number 6,008,988
- Issue date Dec 28, 1999
- Intel Corporation
- Mark J. Palmer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with a plurality of vias that are electr...
- Patent number 5,721,454
- Issue date Feb 24, 1998
- Intel Corporation
- Mark J. Palmer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package that has a plurality of staggered pins
- Patent number 5,691,569
- Issue date Nov 25, 1997
- Intel Corporation
- Mark J. Palmer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standardized power and ground design for pin grid array packages
- Patent number 5,483,099
- Issue date Jan 9, 1996
- Intel Corporation
- Siva Natarajan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heatspreader for cavity down multi-chip module with flip chip
- Patent number 5,289,337
- Issue date Feb 22, 1994
- Intel Corporation
- Mostafa Aghazadeh
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Methods of split cavity wall plating for an integrated circuit package
- Publication number 20040046243
- Publication date Mar 11, 2004
- Elissa E. Carapella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Functional pathway configuration at a system/IC interface
- Publication number 20030086419
- Publication date May 8, 2003
- Mark Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Functional pathway configuration at a system/IC interface
- Publication number 20030033576
- Publication date Feb 13, 2003
- Mark Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable identification in a communications controller
- Publication number 20030016419
- Publication date Jan 23, 2003
- Mark Palmer
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Mark Palmer

Person

Patents Grantslast 30 patents

Functional pathway configuration at a system/IC interface

Methods forming an integrated circuit package with a split cavity wall

Programmable identification in a communications controller

Split cavity wall plating for an integrated circuit package

Integrated circuit package with a heat spreader coupled to a pair o...

Integrated circuit package with a plurality of vias that are electr...

Integrated circuit package that has a plurality of staggered pins

Standardized power and ground design for pin grid array packages

Heatspreader for cavity down multi-chip module with flip chip

Patents Applicationslast 30 patents

Methods of split cavity wall plating for an integrated circuit package

Functional pathway configuration at a system/IC interface

Functional pathway configuration at a system/IC interface

Programmable identification in a communications controller