Mark R. Greenstreet

Person

Vancouver, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Deskew FIFO buffer with simplified initialization
- Patent number 9,584,305
- Issue date Feb 28, 2017
- Oracle International Corporation
- Suwen Yang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flip-flop-based clock deskew circuit
- Patent number 9,197,397
- Issue date Nov 24, 2015
- Oracle International Corporation
- Tarik Ono
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Using speculative cache requests to reduce cache miss delays
- Patent number 8,683,129
- Issue date Mar 25, 2014
- Oracle International Corporation
- Tarik Ono
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Synchronization circuit that facilitates multiple parallel reads an...
- Patent number 8,631,265
- Issue date Jan 14, 2014
- Oracle International Corporation
- Tarik Ono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive synchronization circuit
- Patent number 8,559,576
- Issue date Oct 15, 2013
- Oracle America, Inc.
- Tarik Ono
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Synchronizer latch circuit that facilitates resolving metastability
- Patent number 8,552,779
- Issue date Oct 8, 2013
- Oracle International Corporation
- Ian W. Jones
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interconnect for surfing circuits
- Patent number 8,179,208
- Issue date May 15, 2012
- Oracle America, Inc.
- Robert J. Drost
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
EMI reduction using tunable delay lines
- Patent number 7,333,527
- Issue date Feb 19, 2008
- Sun Microsystems, Inc.
- Mark R. Greenstreet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for providing skew compensation using a self-t...
- Patent number 7,076,680
- Issue date Jul 11, 2006
- Sun Microsystems, Inc.
- Mark R. Greenstreet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for controlling a tunable delay by transferring a signal fro...
- Patent number 7,073,086
- Issue date Jul 4, 2006
- Sun Microsystems, Inc.
- Mark R. Greenstreet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Surfing logic pipelines
- Patent number 6,768,342
- Issue date Jul 27, 2004
- University of British Columbia
- Mark Greenstreet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for facilitating balanced bundles of electrica...
- Patent number 6,703,949
- Issue date Mar 9, 2004
- Sun Microsystems, Inc.
- Mark R. Greenstreet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for data flow analysis
- Patent number 6,694,389
- Issue date Feb 17, 2004
- Sun Microsystems, Inc.
- William S. Coates
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for latching data based on a predetermined num...
- Patent number 6,686,854
- Issue date Feb 3, 2004
- Sun Microsystems, Inc.
- Mark R. Greenstreet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for implementing a doubly balanced code
- Patent number 6,621,427
- Issue date Sep 16, 2003
- Sun Microsystems, Inc.
- Mark R. Greenstreet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Latch control circuit for crossing clock domains
- Patent number 6,486,721
- Issue date Nov 26, 2002
- Sun Microsystems, Inc.
- Mark R. Greenstreet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
DESKEW FIFO BUFFER WITH SIMPLIFIED INITIALIZATION
- Publication number 20160173266
- Publication date Jun 16, 2016
- ORACLE INTERNATIONAL CORPORATION
- Suwen Yang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FILTERING PRE-FETCH REQUESTS TO REDUCE PRE-FETCHING OVERHEAD
- Publication number 20130246708
- Publication date Sep 19, 2013
- Oracle International Corporation
- Tarik Ono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZER LATCH CIRCUIT THAT FACILITATES RESOLVING METASTABILITY
- Publication number 20130135017
- Publication date May 30, 2013
- Oracle International Corporation
- Ian W. Jones
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYNCHRONIZATION CIRCUIT THAT FACILITATES MULTIPLE PARALLEL READS AN...
- Publication number 20120151243
- Publication date Jun 14, 2012
- Oracle International Corporation
- Tarik Ono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING SPECULATIVE CACHE REQUESTS TO REDUCE CACHE MISS DELAYS
- Publication number 20120102269
- Publication date Apr 26, 2012
- Oracle International Corporation
- Tarik Ono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE SYNCHRONIZATION CIRCUIT
- Publication number 20090323876
- Publication date Dec 31, 2009
- SUN MICROSYSTEMS, INC.
- Tarik Ono
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT FOR SURFING CIRCUITS
- Publication number 20090102581
- Publication date Apr 23, 2009
- SUN MICROSYSTEMS, INC.
- Robert J. Drost
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR LATCHING DATA BASED ON A PREDETERMINED NUM...
- Publication number 20030222802
- Publication date Dec 4, 2003
- Mark R. Greenstreet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Self-timed pipeline for tunable delays
- Publication number 20030177409
- Publication date Sep 18, 2003
- SUN MICROSYSTEMS, INC.
- Mark R. Greenstreet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EMI reduction using tunable delay lines
- Publication number 20030169838
- Publication date Sep 11, 2003
- SUN MICROSYSTEMS, INC.
- Mark R. Greenstreet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Surfing logic pipelines
- Publication number 20030076131
- Publication date Apr 24, 2003
- Mark Greenstreet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for facilitating balanced bundles of electrica...
- Publication number 20030076246
- Publication date Apr 24, 2003
- Mark R. Greenstreet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for implementing a doubly balanced code
- Publication number 20030071745
- Publication date Apr 17, 2003
- Mark R. Greenstreet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for data flow analysis
- Publication number 20020161945
- Publication date Oct 31, 2002
- William S. Coates
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LATCH CONTROL CIRCUIT FOR CROSSING CLOCK DOMAINS
- Publication number 20020121922
- Publication date Sep 5, 2002
- Mark R. Greenstreet
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Mark R. Greenstreet

Person

Patents Grantslast 30 patents

Deskew FIFO buffer with simplified initialization

Flip-flop-based clock deskew circuit

Using speculative cache requests to reduce cache miss delays

Synchronization circuit that facilitates multiple parallel reads an...

Adaptive synchronization circuit

Synchronizer latch circuit that facilitates resolving metastability

Interconnect for surfing circuits

EMI reduction using tunable delay lines

Method and apparatus for providing skew compensation using a self-t...

System for controlling a tunable delay by transferring a signal fro...

Surfing logic pipelines

Method and apparatus for facilitating balanced bundles of electrica...

Method and apparatus for data flow analysis

Method and apparatus for latching data based on a predetermined num...

Method and apparatus for implementing a doubly balanced code

Latch control circuit for crossing clock domains

Patents Applicationslast 30 patents

DESKEW FIFO BUFFER WITH SIMPLIFIED INITIALIZATION

FILTERING PRE-FETCH REQUESTS TO REDUCE PRE-FETCHING OVERHEAD

SYNCHRONIZER LATCH CIRCUIT THAT FACILITATES RESOLVING METASTABILITY

SYNCHRONIZATION CIRCUIT THAT FACILITATES MULTIPLE PARALLEL READS AN...

USING SPECULATIVE CACHE REQUESTS TO REDUCE CACHE MISS DELAYS

ADAPTIVE SYNCHRONIZATION CIRCUIT

INTERCONNECT FOR SURFING CIRCUITS

METHOD AND APPARATUS FOR LATCHING DATA BASED ON A PREDETERMINED NUM...

Self-timed pipeline for tunable delays

EMI reduction using tunable delay lines

Surfing logic pipelines

Method and apparatus for facilitating balanced bundles of electrica...

Method and apparatus for implementing a doubly balanced code

Method and apparatus for data flow analysis

LATCH CONTROL CIRCUIT FOR CROSSING CLOCK DOMAINS