Mark Rowland

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamically modifying a power/performance tradeoff based on a proce...
- Patent number 9,760,409
- Issue date Sep 12, 2017
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically adjusting power of non-core processor circuitry includi...
- Patent number 9,501,129
- Issue date Nov 22, 2016
- Intel Corporation
- Krishnakanth Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically modifying a power/performance tradeoff based on process...
- Patent number 9,372,524
- Issue date Jun 21, 2016
- Intel Corporation
- Krishnakanth V. Sistla
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Dynamically adjusting power of non-core processor circuitry includi...
- Patent number 8,914,650
- Issue date Dec 16, 2014
- Intel Corporation
- Krishnakanth Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance prioritization in multi-threaded processors
- Patent number 8,275,942
- Issue date Sep 25, 2012
- Intel Corporation
- Theodros Yigzaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and a system for dynamically configuring a prefe...
- Patent number 8,079,031
- Issue date Dec 13, 2011
- Intel Corporation
- Geeyarpuram N. Santhanakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for an hierarchical cache line replac...
- Patent number 7,711,901
- Issue date May 4, 2010
- Intel Corporation
- Christopher J. Shannon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache eviction technique for reducing cache eviction traffic
- Patent number 7,277,992
- Issue date Oct 2, 2007
- Intel Corporation
- Christopher J. Shannon
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Dynamically Modifying A Power/Performance Tradeoff Based On A Proce...
- Publication number 20160266941
- Publication date Sep 15, 2016
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Adjusting Power Of Non-Core Processor Circuitry
- Publication number 20130179716
- Publication date Jul 11, 2013
- Krishnakanth Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Adjusting Power Of Non-Core Processor Circuitry
- Publication number 20130080795
- Publication date Mar 28, 2013
- Krishnakanth Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Modifying A Power/Performance Tradeoff Based On Process...
- Publication number 20120144217
- Publication date Jun 7, 2012
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache eviction technique for inclusive cache systems
- Publication number 20070186045
- Publication date Aug 9, 2007
- Christopher J. Shannon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performance prioritization in multi-threaded processors
- Publication number 20070150657
- Publication date Jun 28, 2007
- Intel Corporation
- Theodros Yigzaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and a system for a software configurable prefetcher
- Publication number 20070094453
- Publication date Apr 26, 2007
- Geeyarpuram N. Santhanakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache eviction technique for reducing cache eviction traffic
- Publication number 20060218352
- Publication date Sep 28, 2006
- Christopher J. Shannon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for an hierarchical cache line replac...
- Publication number 20040260880
- Publication date Dec 23, 2004
- Christopher J. Shannon
- G06 - COMPUTING CALCULATING COUNTING

Mark Rowland

Person

Patents Grantslast 30 patents

Dynamically modifying a power/performance tradeoff based on a proce...

Dynamically adjusting power of non-core processor circuitry includi...

Dynamically modifying a power/performance tradeoff based on process...

Dynamically adjusting power of non-core processor circuitry includi...

Performance prioritization in multi-threaded processors

Method, apparatus, and a system for dynamically configuring a prefe...

Method, system, and apparatus for an hierarchical cache line replac...

Cache eviction technique for reducing cache eviction traffic

Patents Applicationslast 30 patents

Dynamically Modifying A Power/Performance Tradeoff Based On A Proce...

Dynamically Adjusting Power Of Non-Core Processor Circuitry

Dynamically Adjusting Power Of Non-Core Processor Circuitry

Dynamically Modifying A Power/Performance Tradeoff Based On Process...

Cache eviction technique for inclusive cache systems

Performance prioritization in multi-threaded processors

Method, apparatus, and a system for a software configurable prefetcher

Cache eviction technique for reducing cache eviction traffic

Method, system, and apparatus for an hierarchical cache line replac...