Mark S. Gorbics

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Franklin Lakes, NJ, US

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Patents Grantslast 30 patents

Information Patent Grant
Statistically-based display processing
- Patent number 8,330,758
- Issue date Dec 11, 2012
- Teledyne LeCroy, Inc.
- Mark Gorbics
- G01 - MEASURING TESTING
Information Patent Grant
Fractional-decimation signal processing
- Patent number 7,466,247
- Issue date Dec 16, 2008
- LeCroy Corporation
- Mark S. Gorbics
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel decimation circuits
- Patent number 7,124,159
- Issue date Oct 17, 2006
- LeCroy Corporation
- Mark Steven Gorbics
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel decimation circuits
- Patent number 6,859,813
- Issue date Feb 22, 2005
- LeCroy Corporation
- Mark Steven Gorbics
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vernier delay line interpolator and coarse counter realignment
- Patent number 5,838,754
- Issue date Nov 17, 1998
- LeCroy Corporation
- Mark S. Gorbics
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Vernier delay line interpolator and coarse counter realignment
- Patent number 5,703,838
- Issue date Dec 30, 1997
- LeCroy Corporation
- Mark S. Gorbics
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Statistically-based Display Processing
- Publication number 20090309879
- Publication date Dec 17, 2009
- LeCroy Corporation
- Mark Gorbics
- G01 - MEASURING TESTING
Information Patent Application
Parallel decimation circuits
- Publication number 20050144207
- Publication date Jun 30, 2005
- Mark Steven Gorbics
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel decimation circuits
- Publication number 20030110194
- Publication date Jun 12, 2003
- Mark Steven Gorbics
- G06 - COMPUTING CALCULATING COUNTING