Mark S. Papamarcos

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
System for and method of connecting a hardware modeling element to...
- Patent number 6,148,275
- Issue date Nov 14, 2000
- Synopsys, Inc.
- Mark Stanley Papamarcos
- G01 - MEASURING TESTING
Information Patent Grant
Logic analysis subsystem in a time-sliced emulator
- Patent number 6,141,636
- Issue date Oct 31, 2000
- Quickturn Design Systems, Inc.
- Tony R. Sarno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software reconfigurable target I/O in a circuit emulation system
- Patent number 5,963,736
- Issue date Oct 5, 1999
- Quickturn Design Systems, Inc.
- Tony R. Sarno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware modeling system and method of use
- Patent number 5,625,580
- Issue date Apr 29, 1997
- Synopsys, Inc.
- Andrew J. Read
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for and method of connecting a hardware modeling element to...
- Patent number 5,369,593
- Issue date Nov 29, 1994
- Synopsys Inc.
- Mark S. Papamarcos
- G01 - MEASURING TESTING
Information Patent Grant
Hardware modeling system and method of use
- Patent number 5,353,243
- Issue date Oct 4, 1994
- Synopsys Inc.
- Andrew J. Read
- G06 - COMPUTING CALCULATING COUNTING