Mark T. Bohr

Person

Aloha, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hyperchip
- Patent number 12,355,002
- Issue date Jul 8, 2025
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having tipless epitaxial source/drain regions
- Patent number 12,288,821
- Issue date Apr 29, 2025
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate contact structure over active gate and method to fabricate same
- Patent number 12,278,144
- Issue date Apr 15, 2025
- Intel Corporation
- Abhijit Jayant Pethe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contacts
- Patent number 12,266,571
- Issue date Apr 1, 2025
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Uniform layouts for SRAM and register file bit cells
- Patent number 12,171,090
- Issue date Dec 17, 2024
- Intel Corporation
- Zheng Guo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having source or drai...
- Patent number 12,159,901
- Issue date Dec 3, 2024
- Intel Corporation
- Cory Bomberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deep trench via for three-dimensional integrated circuit
- Patent number 12,100,705
- Issue date Sep 24, 2024
- Intel Corporation
- Yih Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hyperchip
- Patent number 12,074,138
- Issue date Aug 27, 2024
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi version library cell handling and integrated circuit structur...
- Patent number 12,067,338
- Issue date Aug 20, 2024
- Intel Corporation
- Ranjith Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit device with crenellated metal trace layout
- Patent number 11,996,362
- Issue date May 28, 2024
- Intel Corporation
- Patrick Morrow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hyperchip
- Patent number 11,984,430
- Issue date May 14, 2024
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package on active silicon semiconductor packages
- Patent number 11,978,727
- Issue date May 7, 2024
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contacts
- Patent number 11,887,891
- Issue date Jan 30, 2024
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device layer interconnects
- Patent number 11,881,452
- Issue date Jan 23, 2024
- Intel Corporation
- Mark Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device, system and method for providing inductor structures
- Patent number 11,830,829
- Issue date Nov 28, 2023
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hyperchip
- Patent number 11,824,041
- Issue date Nov 21, 2023
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device, method and system for providing a stacked arrangement of in...
- Patent number 11,749,663
- Issue date Sep 5, 2023
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Uniform layouts for SRAM and register file bit cells
- Patent number 11,737,253
- Issue date Aug 22, 2023
- Intel Corporation
- Zheng Guo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnection scheme for providing a high yielding process fo...
- Patent number 11,652,060
- Issue date May 16, 2023
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate-less FinFET diode architectures with backside metal conta...
- Patent number 11,652,107
- Issue date May 16, 2023
- Intel Corporation
- Nicholas Thomson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit device with back-side interconnection to deep so...
- Patent number 11,616,015
- Issue date Mar 28, 2023
- Intel Corporation
- Patrick Morrow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-aligned contacts
- Patent number 11,600,524
- Issue date Mar 7, 2023
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate edge and local interconnect
- Patent number 11,563,081
- Issue date Jan 24, 2023
- Daedalus Prime LLC
- Milton Clair Webb
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having source or drai...
- Patent number 11,522,048
- Issue date Dec 6, 2022
- Intel Corporation
- Cory Bomberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit structures having asymmetric source and drain st...
- Patent number 11,462,536
- Issue date Oct 4, 2022
- Intel Corporation
- Anupama Bowonder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having tipless epitaxial source/drain regions
- Patent number 11,437,514
- Issue date Sep 6, 2022
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device layer interconnects
- Patent number 11,410,928
- Issue date Aug 9, 2022
- Intel Corporation
- Mark Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device, system and method for providing inductor structures
- Patent number 11,387,198
- Issue date Jul 12, 2022
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deep trench via for three-dimensional integrated circuit
- Patent number 11,373,999
- Issue date Jun 28, 2022
- Intel Corporation
- Yih Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device, method and system for providing a stacked arrangement of in...
- Patent number 11,373,987
- Issue date Jun 28, 2022
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SELF-ALIGNED CONTACTS
- Publication number 20250239486
- Publication date Jul 24, 2025
- Intel Corporation
- Mark T. BOHR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE CONTACT STRUCTURE OVER ACTIVE GATE AND METHOD TO FABRICATE SAME
- Publication number 20250233020
- Publication date Jul 17, 2025
- Intel Corporation
- Abhijit Jayant PETHE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...
- Publication number 20250225306
- Publication date Jul 10, 2025
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THROUGH GATE FIN ISOLATION
- Publication number 20250227989
- Publication date Jul 10, 2025
- Intel Corporation
- Mark T. BOHR
Information Patent Application
UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS
- Publication number 20250071963
- Publication date Feb 27, 2025
- Intel Corporation
- Zheng GUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAI...
- Publication number 20250048698
- Publication date Feb 6, 2025
- Intel Corporation
- Cory BOMBERGER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...
- Publication number 20240362391
- Publication date Oct 31, 2024
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYPERCHIP
- Publication number 20240243099
- Publication date Jul 18, 2024
- Intel Corporation
- Mark T. BOHR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE LAYER INTERCONNECTS
- Publication number 20240096791
- Publication date Mar 21, 2024
- Intel Corporation
- Mark Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYPERCHIP
- Publication number 20240038722
- Publication date Feb 1, 2024
- Intel Corporation
- Mark T. BOHR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED CONTACTS
- Publication number 20240030067
- Publication date Jan 25, 2024
- Intel Corporation
- Mark T. BOHR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS
- Publication number 20230328947
- Publication date Oct 12, 2023
- Intel Corporation
- Zheng GUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REPLACEMENT METAL GATES TO ENHANCE TRANSISTOR STRAIN
- Publication number 20230307455
- Publication date Sep 28, 2023
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE INTERCONNECTION SCHEME FOR PROVIDING A HIGH YIELDING PROCESS FO...
- Publication number 20230245974
- Publication date Aug 3, 2023
- Intel Corporation
- Wilfred GOMES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYPERCHIP
- Publication number 20230238357
- Publication date Jul 27, 2023
- Intel Corporation
- Mark T. BOHR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE EDGE AND LOCAL INTERCONNECT
- Publication number 20230178594
- Publication date Jun 8, 2023
- Milton Clair Webb
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED CONTACTS
- Publication number 20230154793
- Publication date May 18, 2023
- Intel Corporation
- Mark T. BOHR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAI...
- Publication number 20230058558
- Publication date Feb 23, 2023
- Intel Corporation
- Cory BOMBERGER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING TIPLESS EPITAXIAL SOURCE/DRAIN REGIONS
- Publication number 20220359753
- Publication date Nov 10, 2022
- Intel Corporation
- Mark T. Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE LAYER INTERCONNECTS
- Publication number 20220319978
- Publication date Oct 6, 2022
- Intel Corporation
- Mark Bohr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE, SYSTEM AND METHOD FOR PROVIDING INDUCTOR STRUCTURES
- Publication number 20220302051
- Publication date Sep 22, 2022
- Intel Corporation
- Wilfred GOMES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEEP TRENCH VIA FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT
- Publication number 20220285342
- Publication date Sep 8, 2022
- Intel Corporation
- Yih WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE, METHOD AND SYSTEM FOR PROVIDING A STACKED ARRANGEMENT OF IN...
- Publication number 20220271022
- Publication date Aug 25, 2022
- Intel Corporation
- Wilfred GOMES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...
- Publication number 20220149075
- Publication date May 12, 2022
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED SEMICONDUCTOR DIE AND PACKAGE ARCHITECTURE
- Publication number 20220139896
- Publication date May 5, 2022
- Intel Corporation
- WILFRED GOMES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COPPER-FILLED TRENCH CONTACT FOR TRANSISTOR PERFORMANCE IMPROVEMENT
- Publication number 20220115505
- Publication date Apr 14, 2022
- Intel Corporation
- KELIN J. KUHN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DESIGNS AND METHODS FOR CONDUCTIVE BUMPS
- Publication number 20220059484
- Publication date Feb 24, 2022
- Intel Corporation
- Valery M. DUBIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE WITH CRENELLATED METAL TRACE LAYOUT
- Publication number 20220028779
- Publication date Jan 27, 2022
- Intel Corporation
- Patrick Morrow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUNCTIONALLY REDUNDANT SEMICONDUCTOR DIES AND PACKAGE
- Publication number 20210375825
- Publication date Dec 2, 2021
- Intel Corporation
- Wilfred Gomes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH GATE FIN ISOLATION
- Publication number 20210233908
- Publication date Jul 29, 2021
- Intel Corporation
- Mark T. BOHR
- H01 - BASIC ELECTRIC ELEMENTS

Mark T. Bohr

Person

Patents Grantslast 30 patents

Hyperchip

Semiconductor device having tipless epitaxial source/drain regions

Gate contact structure over active gate and method to fabricate same

Self-aligned contacts

Uniform layouts for SRAM and register file bit cells

Gate-all-around integrated circuit structures having source or drai...

Deep trench via for three-dimensional integrated circuit

Hyperchip

Multi version library cell handling and integrated circuit structur...

Integrated circuit device with crenellated metal trace layout

Hyperchip

Package on active silicon semiconductor packages

Self-aligned contacts

Device layer interconnects

Device, system and method for providing inductor structures

Hyperchip

Device, method and system for providing a stacked arrangement of in...

Uniform layouts for SRAM and register file bit cells

Die interconnection scheme for providing a high yielding process fo...

Substrate-less FinFET diode architectures with backside metal conta...

Integrated circuit device with back-side interconnection to deep so...

Self-aligned contacts

Self-aligned gate edge and local interconnect

Gate-all-around integrated circuit structures having source or drai...

Integrated circuit structures having asymmetric source and drain st...

Semiconductor device having tipless epitaxial source/drain regions

Device layer interconnects

Device, system and method for providing inductor structures

Deep trench via for three-dimensional integrated circuit

Device, method and system for providing a stacked arrangement of in...

Patents Applicationslast 30 patents

SELF-ALIGNED CONTACTS

GATE CONTACT STRUCTURE OVER ACTIVE GATE AND METHOD TO FABRICATE SAME

MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...

THROUGH GATE FIN ISOLATION

UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAI...

MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...

HYPERCHIP

DEVICE LAYER INTERCONNECTS

HYPERCHIP

SELF-ALIGNED CONTACTS

UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS

REPLACEMENT METAL GATES TO ENHANCE TRANSISTOR STRAIN

DIE INTERCONNECTION SCHEME FOR PROVIDING A HIGH YIELDING PROCESS FO...

HYPERCHIP

SELF-ALIGNED GATE EDGE AND LOCAL INTERCONNECT

SELF-ALIGNED CONTACTS

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING SOURCE OR DRAI...

SEMICONDUCTOR DEVICE HAVING TIPLESS EPITAXIAL SOURCE/DRAIN REGIONS

DEVICE LAYER INTERCONNECTS

DEVICE, SYSTEM AND METHOD FOR PROVIDING INDUCTOR STRUCTURES

DEEP TRENCH VIA FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT

DEVICE, METHOD AND SYSTEM FOR PROVIDING A STACKED ARRANGEMENT OF IN...

MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...

DISTRIBUTED SEMICONDUCTOR DIE AND PACKAGE ARCHITECTURE

COPPER-FILLED TRENCH CONTACT FOR TRANSISTOR PERFORMANCE IMPROVEMENT

DESIGNS AND METHODS FOR CONDUCTIVE BUMPS

INTEGRATED CIRCUIT DEVICE WITH CRENELLATED METAL TRACE LAYOUT

FUNCTIONALLY REDUNDANT SEMICONDUCTOR DIES AND PACKAGE

THROUGH GATE FIN ISOLATION