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Mark W. Jetton
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Fort Collins, CO, US
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last 30 patents
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Patent Grant
Floor plan-based power bus analysis and design tool for integrated...
Patent number
6,675,139
Issue date
Jan 6, 2004
LSI Logic Corporation
Mark W. Jetton
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Method of determining delay in logic cell models
Patent number
6,028,995
Issue date
Feb 22, 2000
LSI Logic Corporation
Mark W. Jetton
G06 - COMPUTING CALCULATING COUNTING