Markus Buehler

Person

Weil im Schoenbuch, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Partial computer processor core shutoff
- Patent number 11,281,474
- Issue date Mar 22, 2022
- International Business Machines Corporation
- Thilo Maurer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware apparatus to measure memory locality
- Patent number 10,831,493
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Congestion mitigation by wire ordering
- Patent number 9,760,669
- Issue date Sep 12, 2017
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parsing data representative of a hardware design into commands of a...
- Patent number 8,756,538
- Issue date Jun 17, 2014
- International Business Machines Corporation
- Hans-Werner Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for calculating timing delay in a repeater networ...
- Patent number 8,731,858
- Issue date May 20, 2014
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Gate configuration determination and selection from standard cell l...
- Patent number 8,627,263
- Issue date Jan 7, 2014
- International Business Machines Corporation
- Thomas Buechner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Estimating power consumption of an electronic circuit
- Patent number 8,612,911
- Issue date Dec 17, 2013
- International Business Machines Corporation
- Thomas Buechner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal repowering chip for 3-dimensional integrated circuit
- Patent number 8,513,663
- Issue date Aug 20, 2013
- International Business Machines Corporation
- Markus Buehler
- G01 - MEASURING TESTING
Information Patent Grant
Write buffer for improved DRAM write access patterns
- Patent number 8,495,286
- Issue date Jul 23, 2013
- International Business Machines Corporation
- Cagri Balkesen
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Glitch power reduction
- Patent number 8,407,654
- Issue date Mar 26, 2013
- International Business Machines Corporation
- Thomas Buechner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing intersection of sets of numbers
- Patent number 8,380,737
- Issue date Feb 19, 2013
- International Business Machines Corporation
- Cagri Balkesen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant micro-loop structure for use in an integrated circuit phy...
- Patent number 8,234,594
- Issue date Jul 31, 2012
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure for an integrated circuit design for reducing coupling be...
- Patent number 8,032,851
- Issue date Oct 4, 2011
- International Business Machines Corporation
- Moussadek Belaidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing of wires of an electronic circuit
- Patent number 8,015,527
- Issue date Sep 6, 2011
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test yield estimate for semiconductor products created from a library
- Patent number 8,010,916
- Issue date Aug 30, 2011
- International Business Machines Corporation
- Jeanne Bickford
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and system for placement of electric circuit components in i...
- Patent number 8,010,925
- Issue date Aug 30, 2011
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing coupling between wires of an electronic circuit
- Patent number 8,006,208
- Issue date Aug 23, 2011
- International Business Machines Corporation
- Moussadek Belaidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer readable medium, system and associated method for designin...
- Patent number 7,996,808
- Issue date Aug 9, 2011
- International Business Machines Corporation
- Andreas Arp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Design structure for a redundant micro-loop structure for use in an...
- Patent number 7,984,394
- Issue date Jul 19, 2011
- International Business Machines Corporation
- Brent A. Anderson
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Via structure to improve routing of wires within an integrated circuit
- Patent number 7,962,881
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Markus T. Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant micro-loop structure for use in an integrated circuit phy...
- Patent number 7,960,836
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, system, and computer program product for coupled noise timi...
- Patent number 7,904,861
- Issue date Mar 8, 2011
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Yield optimization in router for systematic defects
- Patent number 7,398,485
- Issue date Jul 8, 2008
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test yield estimate for semiconductor products created from a library
- Patent number 7,386,815
- Issue date Jun 10, 2008
- International Business Machines Corporation
- Jeanne Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of redundant routes to increase the yield and reliability of a...
- Patent number 7,308,669
- Issue date Dec 11, 2007
- International Business Machines Corporation
- Markus T. Buehler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CENTRAL CONTROLLER FOR A QUANTUM SYSTEM
- Publication number 20230342647
- Publication date Oct 26, 2023
- International Business Machines Corporation
- Frank Haverkamp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTITASKING SCHEME FOR QUANTUM COMPUTERS
- Publication number 20230342652
- Publication date Oct 26, 2023
- International Business Machines Corporation
- Frank Haverkamp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL COMPUTER PROCESSOR CORE SHUTOFF
- Publication number 20210303313
- Publication date Sep 30, 2021
- International Business Machines Corporation
- Thilo Maurer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE APPARATUS TO MEASURE MEMORY LOCALITY
- Publication number 20200192669
- Publication date Jun 18, 2020
- International Business Machines Corporation
- Markus BUEHLER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONGESTION MITIGATION BY WIRE ORDERING
- Publication number 20170132351
- Publication date May 11, 2017
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parsing Data Representative of a Hardware Design into Commands of a...
- Publication number 20130219150
- Publication date Aug 22, 2013
- International Business Machines Corporation
- Hans-Werner Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLITCH POWER REDUCTION
- Publication number 20120266120
- Publication date Oct 18, 2012
- International Business Machines Corporation
- Thomas Buechner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GATE CONFIGURATION DETERMINATION AND SELECTION FROM STANDARD CELL L...
- Publication number 20120216168
- Publication date Aug 23, 2012
- International Business Machines Corporation
- Thomas Buechner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ESTIMATING POWER CONSUMPTION OF AN ELECTRONIC CIRCUIT
- Publication number 20120216160
- Publication date Aug 23, 2012
- International Business Machines Corporation
- Thomas Buechner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computing Intersection of Sets of Numbers
- Publication number 20120158774
- Publication date Jun 21, 2012
- International Business Machines Corporation
- CAGRI BALKESEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Write Buffer for Improved DRAM Write Access Patterns
- Publication number 20110302367
- Publication date Dec 8, 2011
- International Business Machines Corporation
- Cagri Balkesen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST-ROUTING COUPLING FIXES FOR INTEGRATED CIRCUITS
- Publication number 20100257503
- Publication date Oct 7, 2010
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Signal Repowering Chip For 3-Dimensional Integrated Circuit
- Publication number 20100237700
- Publication date Sep 23, 2010
- International Business Machines Corporation
- Markus Buehler
- G01 - MEASURING TESTING
Information Patent Application
REDUCING COUPLING BETWEEN WIRES OF AN ELECTRONIC CIRCUIT
- Publication number 20100223588
- Publication date Sep 2, 2010
- International Business Machines Corporation
- Moussadek Belaidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Structure for a Redundant Micro-Loop Structure for use in an...
- Publication number 20100211923
- Publication date Aug 19, 2010
- International Business Machines Corporation
- Brent A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Calculating Timing Delay in a Repeater Networ...
- Publication number 20100100347
- Publication date Apr 22, 2010
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIA STRUCTURE TO IMPROVE ROUTING OF WIRES WITHIN AN INTEGRATED CIRCUIT
- Publication number 20100031220
- Publication date Feb 4, 2010
- International Business Machines Corporation
- Markus T. Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Structure for a Redundant Micro-Loop Structure for use in an...
- Publication number 20090158231
- Publication date Jun 18, 2009
- International Business Machines Corporation
- Brent A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer Readable Medium, System and Associated Method For Designin...
- Publication number 20090031274
- Publication date Jan 29, 2009
- International Business Machines Corporation
- Andreas Arp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Delay Calculation Method, A Data Processing Program and A Computer...
- Publication number 20090013293
- Publication date Jan 8, 2009
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR COUPLED NOISE TIMI...
- Publication number 20080313588
- Publication date Dec 18, 2008
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Placement of Electric Circuit Components in I...
- Publication number 20080301612
- Publication date Dec 4, 2008
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST YIELD ESTIMATE FOR SEMICONDUCTOR PRODUCTS CREATED FROM A LIBRARY
- Publication number 20080189664
- Publication date Aug 7, 2008
- International Business Machines Corporation
- Jeanne Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN FOR REDUCING COUPLING BETWEEN WIRES OF AN...
- Publication number 20080184186
- Publication date Jul 31, 2008
- Moussadek Belaidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUNDANT MICRO-LOOP STRUCTURE FOR USE IN AN INTERGRATED CIRCUIT PH...
- Publication number 20080150149
- Publication date Jun 26, 2008
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ROUTING METHOD FOR REDUCING COUPLING BETWEEN WIRES OF AN ELECTRONIC...
- Publication number 20080148213
- Publication date Jun 19, 2008
- Moussadek Belaidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Redundant Micro-Loop Structure For Use In An Integrated Circuit Phy...
- Publication number 20080097738
- Publication date Apr 24, 2008
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and System for Designing Fan-out Nets Connecting a Signal So...
- Publication number 20080059933
- Publication date Mar 6, 2008
- International Business Machines Corporation
- Erich Barke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
YIELD OPTIMIZATION IN ROUTER FOR SYSTEMATIC DEFECTS
- Publication number 20070240090
- Publication date Oct 11, 2007
- Jeanne P Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST YIELD ESTIMATE FOR SEMICONDUCTOR PRODUCTS CREATED FROM A LIBRARY
- Publication number 20070099236
- Publication date May 3, 2007
- International Business Machines Corporation
- Jeanne Bickford
- G06 - COMPUTING CALCULATING COUNTING

Markus Buehler

Person

Patents Grantslast 30 patents

Partial computer processor core shutoff

Hardware apparatus to measure memory locality

Congestion mitigation by wire ordering

Parsing data representative of a hardware design into commands of a...

Method and system for calculating timing delay in a repeater networ...

Gate configuration determination and selection from standard cell l...

Estimating power consumption of an electronic circuit

Signal repowering chip for 3-dimensional integrated circuit

Write buffer for improved DRAM write access patterns

Glitch power reduction

Computing intersection of sets of numbers

Redundant micro-loop structure for use in an integrated circuit phy...

Structure for an integrated circuit design for reducing coupling be...

Routing of wires of an electronic circuit

Test yield estimate for semiconductor products created from a library

Method and system for placement of electric circuit components in i...

Reducing coupling between wires of an electronic circuit

Computer readable medium, system and associated method for designin...

Design structure for a redundant micro-loop structure for use in an...

Via structure to improve routing of wires within an integrated circuit

Redundant micro-loop structure for use in an integrated circuit phy...

Method, system, and computer program product for coupled noise timi...

Yield optimization in router for systematic defects

Test yield estimate for semiconductor products created from a library

Use of redundant routes to increase the yield and reliability of a...

Patents Applicationslast 30 patents

CENTRAL CONTROLLER FOR A QUANTUM SYSTEM

MULTITASKING SCHEME FOR QUANTUM COMPUTERS

PARTIAL COMPUTER PROCESSOR CORE SHUTOFF

HARDWARE APPARATUS TO MEASURE MEMORY LOCALITY

CONGESTION MITIGATION BY WIRE ORDERING

Parsing Data Representative of a Hardware Design into Commands of a...

GLITCH POWER REDUCTION

GATE CONFIGURATION DETERMINATION AND SELECTION FROM STANDARD CELL L...

ESTIMATING POWER CONSUMPTION OF AN ELECTRONIC CIRCUIT

Computing Intersection of Sets of Numbers

Write Buffer for Improved DRAM Write Access Patterns

POST-ROUTING COUPLING FIXES FOR INTEGRATED CIRCUITS

Signal Repowering Chip For 3-Dimensional Integrated Circuit

REDUCING COUPLING BETWEEN WIRES OF AN ELECTRONIC CIRCUIT

Design Structure for a Redundant Micro-Loop Structure for use in an...

Method and System for Calculating Timing Delay in a Repeater Networ...

VIA STRUCTURE TO IMPROVE ROUTING OF WIRES WITHIN AN INTEGRATED CIRCUIT

Design Structure for a Redundant Micro-Loop Structure for use in an...

Computer Readable Medium, System and Associated Method For Designin...

Delay Calculation Method, A Data Processing Program and A Computer...

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR COUPLED NOISE TIMI...

Method and System for Placement of Electric Circuit Components in I...

TEST YIELD ESTIMATE FOR SEMICONDUCTOR PRODUCTS CREATED FROM A LIBRARY

INTEGRATED CIRCUIT DESIGN FOR REDUCING COUPLING BETWEEN WIRES OF AN...

REDUNDANT MICRO-LOOP STRUCTURE FOR USE IN AN INTERGRATED CIRCUIT PH...

ROUTING METHOD FOR REDUCING COUPLING BETWEEN WIRES OF AN ELECTRONIC...

Redundant Micro-Loop Structure For Use In An Integrated Circuit Phy...

Method and System for Designing Fan-out Nets Connecting a Signal So...

YIELD OPTIMIZATION IN ROUTER FOR SYSTEMATIC DEFECTS

TEST YIELD ESTIMATE FOR SEMICONDUCTOR PRODUCTS CREATED FROM A LIBRARY