Martin Brox

Person

Munich, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Controlled heating of a memory device
- Patent number 12,210,774
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power-efficient access line operation for memory
- Patent number 12,154,613
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Grant
Drive strength calibration for multi-level signaling
- Patent number 12,148,502
- Issue date Nov 19, 2024
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Grant
Transmission failure feedback schemes for reducing crosstalk
- Patent number 12,124,329
- Issue date Oct 22, 2024
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit and signal level mapping
- Patent number 12,099,406
- Issue date Sep 24, 2024
- Stefan Dietrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking a reference voltage after boot-up
- Patent number 12,086,005
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adapting channel current
- Patent number 12,081,331
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Grant
Offset cancellation
- Patent number 12,027,231
- Issue date Jul 2, 2024
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temperature-based memory management
- Patent number 12,019,900
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data inversion techniques
- Patent number 12,015,476
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Stefan Dietrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal path biasing in a memory system
- Patent number 11,989,140
- Issue date May 21, 2024
- Micron Technology, Inc.
- Wolfgang Anton Spirkl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating access line voltages
- Patent number 11,948,622
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic control of error management and signaling
- Patent number 11,914,467
- Issue date Feb 27, 2024
- Michael Dieter Richter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Postamble for multi-level signal modulation
- Patent number 11,870,616
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Stefan Dietrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Channel modulation for a memory device
- Patent number 11,860,731
- Issue date Jan 2, 2024
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mode-dependent heating of a memory device
- Patent number 11,848,044
- Issue date Dec 19, 2023
- Micron Technology, Inc.
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Receive-side crosstalk cancelation
- Patent number 11,762,592
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Wolfgang Anton Spirkl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit and signal level mapping
- Patent number 11,726,865
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Stefan Dietrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level signaling for a memory device
- Patent number 11,721,405
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Wolfgang Anton Spirkl
- G11 - INFORMATION STORAGE
Information Patent Grant
Transmission failure feedback schemes for reducing crosstalk
- Patent number 11,709,730
- Issue date Jul 25, 2023
- Micron Technology, Inc.
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal sampling with offset calibration
- Patent number 11,699,993
- Issue date Jul 11, 2023
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Grant
Drive strength calibration for multi-level signaling
- Patent number 11,688,435
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Grant
Replacement scheme for a pulse amplitude modulated bus
- Patent number 11,652,567
- Issue date May 16, 2023
- Micron Technology, Inc.
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for low power operation
- Patent number 11,621,033
- Issue date Apr 4, 2023
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamically configuring transmission lines of a bus
- Patent number 11,620,241
- Issue date Apr 4, 2023
- Micron Technology, Inc.
- Michael Dieter Richter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for signal path biasing in a memory system
- Patent number 11,609,865
- Issue date Mar 21, 2023
- Micron Technology, Inc.
- Wolfgang Anton Spirkl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data inversion techniques
- Patent number 11,601,215
- Issue date Mar 7, 2023
- Micron Technology, Inc.
- Stefan Dietrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Activate commands for memory preparation
- Patent number 11,600,312
- Issue date Mar 7, 2023
- Micron Technology, Inc.
- Andreas Schneider
- G11 - INFORMATION STORAGE
Information Patent Grant
Reporting control information errors
- Patent number 11,579,988
- Issue date Feb 14, 2023
- Micron Technology, Inc.
- Michael Dieter Richter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device low power mode
- Patent number 11,561,603
- Issue date Jan 24, 2023
- Micron Technology, Inc.
- Michael Dieter Richter
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DATA ALIGNMENT FOR MEMORY
- Publication number 20250069631
- Publication date Feb 27, 2025
- Micron Technology, Inc.
- Martin Bach
- G11 - INFORMATION STORAGE
Information Patent Application
DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
- Publication number 20250046347
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-TIMING READ TERMINATION
- Publication number 20250022506
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Milena Tsvetkova Ivanov
- G11 - INFORMATION STORAGE
Information Patent Application
BIT AND SIGNAL LEVEL MAPPING
- Publication number 20250013527
- Publication date Jan 9, 2025
- Lodestar Licensing Group, LLC
- Stefan Dietrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK
- Publication number 20250013530
- Publication date Jan 9, 2025
- Lodestar Licensing Group, LLC
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE-BASED MEMORY MANAGEMENT
- Publication number 20240402935
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OFFSET CANCELLATION
- Publication number 20240395299
- Publication date Nov 28, 2024
- Lodestar Licensing Group LLC
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATENCY SYNCHRONIZATION
- Publication number 20240385645
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESSING MULTIPLE SEGMENTS OF MEMORY SYSTEMS
- Publication number 20240370205
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INVERSION TECHNIQUES
- Publication number 20240372644
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Stefan Dietrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES AND DEVICES TO REDUCE BUS CROSS TALK FOR MEMORY SYSTEMS
- Publication number 20240321340
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Application
GENERATING ACCESS LINE VOLTAGES
- Publication number 20240290373
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Application
TEMPERATURE SENSOR LINEARIZATION TECHNIQUES
- Publication number 20240240995
- Publication date Jul 18, 2024
- Micron Technology, Inc.
- Luiza Souza Correa
- G01 - MEASURING TESTING
Information Patent Application
COMMAND CLOCK STRUCTURE
- Publication number 20240185909
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC CONTROL OF ERROR MANAGEMENT AND SIGNALING
- Publication number 20240176695
- Publication date May 30, 2024
- Lodestar Licensing Group LLC
- Michael Dieter Richter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE OVERSHOOT MITIGATION
- Publication number 20240153542
- Publication date May 9, 2024
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Application
CHANNEL MODULATION FOR A MEMORY DEVICE
- Publication number 20240126644
- Publication date Apr 18, 2024
- Lodestar Licensing Group LLC
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK
- Publication number 20240095119
- Publication date Mar 21, 2024
- Micron Technology, Inc.
- Peter Mayer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE-DEPENDENT REFRESH OPERATIONS
- Publication number 20240053908
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIT AND SIGNAL LEVEL MAPPING
- Publication number 20240028450
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Stefan Dietrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
- Publication number 20230386527
- Publication date Nov 30, 2023
- Micron Technology, Inc.
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
POWER-EFFICIENT ACCESS LINE OPERATION FOR MEMORY
- Publication number 20230368833
- Publication date Nov 16, 2023
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Application
TRACKING A REFERENCE VOLTAGE AFTER BOOT-UP
- Publication number 20230341915
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING ACCESS LINE VOLTAGES
- Publication number 20230335179
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Application
DATA SCRAMBLING FOR REPEAT OPERATIONS
- Publication number 20230198652
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Martin Brox
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIGNAL PATH BIASING IN A MEMORY SYSTEM
- Publication number 20230195655
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Wolfgang Anton Spirkl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INVERSION TECHNIQUES
- Publication number 20230188248
- Publication date Jun 15, 2023
- Micron Technology, Inc.
- Stefan Dietrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACTIVATE COMMANDS FOR MEMORY PREPARATION
- Publication number 20230162771
- Publication date May 25, 2023
- Micron Technology, Inc.
- Andreas Schneider
- G11 - INFORMATION STORAGE
Information Patent Application
ACTIVATE COMMANDS FOR MEMORY PREPARATION
- Publication number 20230048217
- Publication date Feb 16, 2023
- Micro Technology, Inc.
- Andreas Schneider
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC CONTROL OF ERROR MANAGEMENT AND SIGNALING
- Publication number 20230030776
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Michael Dieter Richter
- G06 - COMPUTING CALCULATING COUNTING

Martin Brox

Person

Patents Grantslast 30 patents

Controlled heating of a memory device

Power-efficient access line operation for memory

Drive strength calibration for multi-level signaling

Transmission failure feedback schemes for reducing crosstalk

Bit and signal level mapping

Tracking a reference voltage after boot-up

Adapting channel current

Offset cancellation

Temperature-based memory management

Data inversion techniques

Signal path biasing in a memory system

Generating access line voltages

Dynamic control of error management and signaling

Postamble for multi-level signal modulation

Channel modulation for a memory device

Mode-dependent heating of a memory device

Receive-side crosstalk cancelation

Bit and signal level mapping

Multi-level signaling for a memory device

Transmission failure feedback schemes for reducing crosstalk

Signal sampling with offset calibration

Drive strength calibration for multi-level signaling

Replacement scheme for a pulse amplitude modulated bus

Techniques for low power operation

Dynamically configuring transmission lines of a bus

Method and apparatus for signal path biasing in a memory system

Data inversion techniques

Activate commands for memory preparation

Reporting control information errors

Memory device low power mode

Patents Applicationslast 30 patents

DATA ALIGNMENT FOR MEMORY

DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING

SELF-TIMING READ TERMINATION

BIT AND SIGNAL LEVEL MAPPING

TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK

TEMPERATURE-BASED MEMORY MANAGEMENT

OFFSET CANCELLATION

LATENCY SYNCHRONIZATION

ACCESSING MULTIPLE SEGMENTS OF MEMORY SYSTEMS

DATA INVERSION TECHNIQUES

TECHNIQUES AND DEVICES TO REDUCE BUS CROSS TALK FOR MEMORY SYSTEMS

GENERATING ACCESS LINE VOLTAGES

TEMPERATURE SENSOR LINEARIZATION TECHNIQUES

COMMAND CLOCK STRUCTURE

DYNAMIC CONTROL OF ERROR MANAGEMENT AND SIGNALING

VOLTAGE OVERSHOOT MITIGATION

CHANNEL MODULATION FOR A MEMORY DEVICE

TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK

TEMPERATURE-DEPENDENT REFRESH OPERATIONS

BIT AND SIGNAL LEVEL MAPPING

DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING

POWER-EFFICIENT ACCESS LINE OPERATION FOR MEMORY

TRACKING A REFERENCE VOLTAGE AFTER BOOT-UP

GENERATING ACCESS LINE VOLTAGES

DATA SCRAMBLING FOR REPEAT OPERATIONS

SIGNAL PATH BIASING IN A MEMORY SYSTEM

DATA INVERSION TECHNIQUES

ACTIVATE COMMANDS FOR MEMORY PREPARATION

ACTIVATE COMMANDS FOR MEMORY PREPARATION

DYNAMIC CONTROL OF ERROR MANAGEMENT AND SIGNALING