Martin N. Weiss

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fabrication of gate-all-around integrated circuit structures having...
- Patent number 12,068,314
- Issue date Aug 20, 2024
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Image-based overlay targets incorporating features for pattern reco...
- Patent number 11,748,869
- Issue date Sep 5, 2023
- Intel Corporation
- Martin Weiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wafer to wafer bonding with low wafer distortion
- Patent number 10,720,345
- Issue date Jul 21, 2020
- Intel Corporation
- Mauro J. Kobrinsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Winged vias to increase overlay margin
- Patent number 8,058,177
- Issue date Nov 15, 2011
- Intel Corporation
- Martin Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level alignment structures using subwavelength grating polari...
- Patent number 8,004,678
- Issue date Aug 23, 2011
- Intel Corporation
- Martin Weiss
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Wafer-based optical pattern recognition targets using regions of gr...
- Patent number 7,564,554
- Issue date Jul 21, 2009
- Intel Corporation
- Martin N. Weiss
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for measuring alignment of layers in photolith...
- Patent number 7,349,105
- Issue date Mar 25, 2008
- Intel Corporation
- Martin Weiss
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for polysilicon resistor formation
- Patent number 7,314,829
- Issue date Jan 1, 2008
- Intel Corporation
- Martin N. Weiss
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20240363628
- Publication date Oct 31, 2024
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ONE-DIMENSIONAL OVERLAY MARKS
- Publication number 20240004310
- Publication date Jan 4, 2024
- Intel Corporation
- William Blanton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR OVERLAY METROLOGY MARKS
- Publication number 20230420381
- Publication date Dec 28, 2023
- Intel Corporation
- Martin N. Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20220093589
- Publication date Mar 24, 2022
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WINGED VIAS TO INCREASE OVERLAY MARGIN
- Publication number 20100025858
- Publication date Feb 4, 2010
- Martin Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer level alignment structures using subwavelength grating polari...
- Publication number 20090002706
- Publication date Jan 1, 2009
- Martin Weiss
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Wafer-based optical pattern recognition targets using regions of gr...
- Publication number 20080002213
- Publication date Jan 3, 2008
- Martin N. Weiss
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and apparatus for measuring alignment of layers in photolith...
- Publication number 20060044568
- Publication date Mar 2, 2006
- Martin Weiss
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and apparatus for polysilicon resistor formation
- Publication number 20060035426
- Publication date Feb 16, 2006
- Martin N. Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Elongated features for improved alignment process integration
- Publication number 20050286052
- Publication date Dec 29, 2005
- Kevin Huggins
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Martin N. Weiss

Person

Patents Grantslast 30 patents

Fabrication of gate-all-around integrated circuit structures having...

Image-based overlay targets incorporating features for pattern reco...

Wafer to wafer bonding with low wafer distortion

Winged vias to increase overlay margin

Wafer level alignment structures using subwavelength grating polari...

Wafer-based optical pattern recognition targets using regions of gr...

Method and apparatus for measuring alignment of layers in photolith...

Method and apparatus for polysilicon resistor formation

Patents Applicationslast 30 patents

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

ONE-DIMENSIONAL OVERLAY MARKS

TECHNOLOGIES FOR OVERLAY METROLOGY MARKS

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

WINGED VIAS TO INCREASE OVERLAY MARGIN

Wafer level alignment structures using subwavelength grating polari...

Wafer-based optical pattern recognition targets using regions of gr...

Method and apparatus for measuring alignment of layers in photolith...

Method and apparatus for polysilicon resistor formation

Elongated features for improved alignment process integration