Martin Ostermayr

Person

Haar, DE

People

Patents Grantslast 30 patents

Information Patent Grant
SRAM memory cell having a dogleg shaped gate electrode structure
- Patent number 8,853,791
- Issue date Oct 7, 2014
- Infineon Technologies AG
- Uwe Paul Schroeder
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitors and methods of manufacture thereof
- Patent number 8,546,916
- Issue date Oct 1, 2013
- Infineon Technologies AG
- Martin Ostermayr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method for manufacturing the same
- Patent number 7,816,198
- Issue date Oct 19, 2010
- Infineon Technologies AG
- Martin Ostermayr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of operating a memory cell, memory cell and memory unit
- Patent number 7,675,799
- Issue date Mar 9, 2010
- Infineon Technologies AG
- Peter Huber
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for preventing the formation of dentrites in a semiconductor
- Patent number 7,655,563
- Issue date Feb 2, 2010
- Infineon Technologies AG
- Gabriela Brase
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell, read device for memory cell, memory assembly, and corr...
- Patent number 7,606,107
- Issue date Oct 20, 2009
- Infineon Technologies AG
- Peter Huber
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory cell and corresponding method of producing same
- Patent number 7,531,420
- Issue date May 12, 2009
- Infineon Technologies AG
- Thomas Nirschl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-transistor memory cells
- Patent number 7,440,334
- Issue date Oct 21, 2008
- Infineon Technologies
- Hans-Joachim Barth
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line dummy core-cell and method for producing a bit line dummy...
- Patent number 7,394,682
- Issue date Jul 1, 2008
- Infineon Technologies AG
- Martin Ostermayr
- G11 - INFORMATION STORAGE
Information Patent Grant
ROM memory cell having defined bit line voltages
- Patent number 7,327,593
- Issue date Feb 5, 2008
- Infineon Technologies AG
- Martin Ostermayr
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory cell and associated fabrication method
- Patent number 7,304,342
- Issue date Dec 4, 2007
- Infineon Technologies AG
- Thomas Nirschl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for programming a memory arrangement and programmed memory a...
- Patent number 7,161,824
- Issue date Jan 9, 2007
- Infineon Technologies AG
- Yannick Martelloni
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable mask ROM building element and process of manufacture
- Patent number 6,906,942
- Issue date Jun 14, 2005
- Infineon Technologies AG
- Martin Ostermayr
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor read-only memory configuration with substrate contact...
- Patent number 6,448,617
- Issue date Sep 10, 2002
- Infineon Technologies AG
- Ekkart Martin
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Capacitors and Methods of Manufacture Thereof
- Publication number 20090294820
- Publication date Dec 3, 2009
- Martin Ostermayr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory Cell, Memory Device, Device and Method of Accessing a Memory...
- Publication number 20090080271
- Publication date Mar 26, 2009
- INFINEON TECHNOLOGIES AG
- Ettore Amirante
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device and Method for Manufacturing the Same
- Publication number 20090014806
- Publication date Jan 15, 2009
- INFINEON TECHNOLOGIES AG
- Martin Ostermayr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of operating a memory cell, memory cell and memory unit
- Publication number 20080205182
- Publication date Aug 28, 2008
- Peter Huber
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell
- Publication number 20080122008
- Publication date May 29, 2008
- Uwe Paul Schroeder
- G11 - INFORMATION STORAGE
Information Patent Application
Solid-State Circuit Assembly
- Publication number 20080124905
- Publication date May 29, 2008
- Gabriela Brase
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bit line dummy core-cell and method for producing a bit line dummy...
- Publication number 20080112245
- Publication date May 15, 2008
- Martin Ostermayr
- G11 - INFORMATION STORAGE
Information Patent Application
Static random access memory with thin oxide capacitor
- Publication number 20080087929
- Publication date Apr 17, 2008
- INFINEON TECHNOLOGIES AG
- Martin Ostermayr
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell, read device for memory cell, memory assembly, and corr...
- Publication number 20070159894
- Publication date Jul 12, 2007
- Infineon Technologies AG
- Peter Huber
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory cell and corresponding method of producing same
- Publication number 20070034920
- Publication date Feb 15, 2007
- Thomas Nirschl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-transistor memory cells
- Publication number 20060164876
- Publication date Jul 27, 2006
- Infineon Technologies AG
- Hans-Joachim Barth
- G11 - INFORMATION STORAGE
Information Patent Application
ROM memory cell having defined bit line voltages
- Publication number 20060152958
- Publication date Jul 13, 2006
- Infineon Technologies AG
- Martin Ostermayr
- G11 - INFORMATION STORAGE
Information Patent Application
Method for programming a memory arrangement and programmed memory a...
- Publication number 20050243637
- Publication date Nov 3, 2005
- Yannick Martelloni
- G11 - INFORMATION STORAGE
Information Patent Application
Solid-state circuit assembly
- Publication number 20050227481
- Publication date Oct 13, 2005
- Infineon Technologies AG
- Gabriela Brase
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor memory cell and associated fabrication method
- Publication number 20050156218
- Publication date Jul 21, 2005
- Thomas Nirschl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Programmable mask ROM building element and process of manufacture
- Publication number 20040136222
- Publication date Jul 15, 2004
- Martin Ostermayr
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR READ-ONLY MEMORY CONFIGURATION WITH SUBSTRATE CONTACT...
- Publication number 20020060347
- Publication date May 23, 2002
- Ekkart Martin
- H01 - BASIC ELECTRIC ELEMENTS

Martin Ostermayr

Person

Patents Grantslast 30 patents

SRAM memory cell having a dogleg shaped gate electrode structure

Capacitors and methods of manufacture thereof

Semiconductor device and method for manufacturing the same

Method of operating a memory cell, memory cell and memory unit

Method for preventing the formation of dentrites in a semiconductor

Memory cell, read device for memory cell, memory assembly, and corr...

Semiconductor memory cell and corresponding method of producing same

Multi-transistor memory cells

Bit line dummy core-cell and method for producing a bit line dummy...

ROM memory cell having defined bit line voltages

Semiconductor memory cell and associated fabrication method

Method for programming a memory arrangement and programmed memory a...

Programmable mask ROM building element and process of manufacture

Semiconductor read-only memory configuration with substrate contact...

Patents Applicationslast 30 patents

Capacitors and Methods of Manufacture Thereof

Memory Cell, Memory Device, Device and Method of Accessing a Memory...

Semiconductor Device and Method for Manufacturing the Same

Method of operating a memory cell, memory cell and memory unit

Memory cell

Solid-State Circuit Assembly

Bit line dummy core-cell and method for producing a bit line dummy...

Static random access memory with thin oxide capacitor

Memory cell, read device for memory cell, memory assembly, and corr...

Semiconductor memory cell and corresponding method of producing same

Multi-transistor memory cells

ROM memory cell having defined bit line voltages

Method for programming a memory arrangement and programmed memory a...

Solid-state circuit assembly

Semiconductor memory cell and associated fabrication method

Programmable mask ROM building element and process of manufacture

SEMICONDUCTOR READ-ONLY MEMORY CONFIGURATION WITH SUBSTRATE CONTACT...