Martin Versen

Person

Munich, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for testing an integrated circuit
- Patent number 7,729,186
- Issue date Jun 1, 2010
- Qimonda AG
- Joerg Kliewer
- G01 - MEASURING TESTING
Information Patent Grant
Test method for determining the wire configuration for circuit carr...
- Patent number 7,428,673
- Issue date Sep 23, 2008
- Infineon Technologies AG
- Jörg Kliewer
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundant wordline deactivation scheme
- Patent number 7,405,986
- Issue date Jul 29, 2008
- Infineon Technologies AG
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for checking output signals of an integrated c...
- Patent number 7,380,182
- Issue date May 27, 2008
- Infineon Technologies AG
- Peter Beer
- G11 - INFORMATION STORAGE
Information Patent Grant
Monitoring device for monitoring internal signals during initializa...
- Patent number 7,340,313
- Issue date Mar 4, 2008
- Infineon Technologies AG
- Manfred Moser
- G11 - INFORMATION STORAGE
Information Patent Grant
Test mode method and apparatus for internal memory timing signals
- Patent number 7,339,841
- Issue date Mar 4, 2008
- Infineon Technologies AG
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage monitoring test mode and test adapter
- Patent number 7,308,624
- Issue date Dec 11, 2007
- Infineon Technologies North America Corp.
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Grant
Serial presence detect functionality on memory component
- Patent number 7,263,019
- Issue date Aug 28, 2007
- Infineon Technologies AG
- Klaus Nierle
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor memory with redundant memory cells
- Patent number 7,203,106
- Issue date Apr 10, 2007
- Infineon Technologies AG
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing an electric circuit
- Patent number 7,191,085
- Issue date Mar 13, 2007
- Infineon Technologies AG
- Thomas Neyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing an integrated semiconductor memory
- Patent number 7,184,337
- Issue date Feb 27, 2007
- Infineon Technologies AG
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for the defect analysis of memory modules
- Patent number 7,124,336
- Issue date Oct 17, 2006
- Infineon Technologies AG
- Frank Adler
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing the serviceability of bit lines in a DRAM memory...
- Patent number 7,120,070
- Issue date Oct 10, 2006
- Infineon Technologies AG
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and test circuit for testing a dynamic memory circuit
- Patent number 6,862,234
- Issue date Mar 1, 2005
- Infineon Technologies AG
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for determining the transit time of electrical signals on pr...
- Patent number 6,703,844
- Issue date Mar 9, 2004
- Infineon Technologies AG
- Frank Adler
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Method and System for Testing an Integrated Circuit
- Publication number 20080205173
- Publication date Aug 28, 2008
- Joerg Kliewer
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR TESTING A MEMORY DEVICE
- Publication number 20070250745
- Publication date Oct 25, 2007
- QIMONDA AG
- Ralf Schneider
- G11 - INFORMATION STORAGE
Information Patent Application
Test mode for IPP current measurement for wordline defect detection
- Publication number 20070153596
- Publication date Jul 5, 2007
- Michael A. Kilian
- G11 - INFORMATION STORAGE
Information Patent Application
Chip specific test mode execution on a memory module
- Publication number 20070094554
- Publication date Apr 26, 2007
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Application
Redundant wordline deactivation scheme
- Publication number 20070070745
- Publication date Mar 29, 2007
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Application
Test mode method and apparatus for internal memory timing signals
- Publication number 20070064505
- Publication date Mar 22, 2007
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Application
Serial presence detect functionality on memory component
- Publication number 20070058470
- Publication date Mar 15, 2007
- Klaus Nierle
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Testmode and test method for increased stress duty cycles during bu...
- Publication number 20070038804
- Publication date Feb 15, 2007
- Klaus Nierle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage monitoring test mode and test adapter
- Publication number 20060248413
- Publication date Nov 2, 2006
- Martin Versen
- G01 - MEASURING TESTING
Information Patent Application
Method for testing an electric circuit
- Publication number 20060049844
- Publication date Mar 9, 2006
- Infineon Technologies AG
- Thomas Neyer
- G01 - MEASURING TESTING
Information Patent Application
Test method for determining the wire configuration for circuit carr...
- Publication number 20060053354
- Publication date Mar 9, 2006
- Infineon Technologies AG
- Jorg Kliewer
- G11 - INFORMATION STORAGE
Information Patent Application
Method for testing an integrated semiconductor memory
- Publication number 20060044900
- Publication date Mar 2, 2006
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Application
Method for testing the serviceability of bit lines in a DRAM memory...
- Publication number 20060048022
- Publication date Mar 2, 2006
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated semiconductor memory with redundant memory cells
- Publication number 20060023556
- Publication date Feb 2, 2006
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Application
Monitoring device for monitoring internal signals during initializa...
- Publication number 20050209715
- Publication date Sep 22, 2005
- Manfred Moser
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for checking output signals of an integrated c...
- Publication number 20050114734
- Publication date May 26, 2005
- Peter Beer
- G11 - INFORMATION STORAGE
Information Patent Application
Method and test circuit for testing a dynamic memory circuit
- Publication number 20040257893
- Publication date Dec 23, 2004
- Martin Versen
- G11 - INFORMATION STORAGE
Information Patent Application
Memory management configuration and method for making a main memory
- Publication number 20040034809
- Publication date Feb 19, 2004
- Martin Versen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for determining the transit time of electrical signals on pr...
- Publication number 20030034784
- Publication date Feb 20, 2003
- Frank Adler
- G01 - MEASURING TESTING
Information Patent Application
Method for the defect analysis of memory modules
- Publication number 20030028342
- Publication date Feb 6, 2003
- Frank Adler
- G11 - INFORMATION STORAGE

Martin Versen

Person

Patents Grantslast 30 patents

Method and system for testing an integrated circuit

Test method for determining the wire configuration for circuit carr...

Redundant wordline deactivation scheme

Method and apparatus for checking output signals of an integrated c...

Monitoring device for monitoring internal signals during initializa...

Test mode method and apparatus for internal memory timing signals

Voltage monitoring test mode and test adapter

Serial presence detect functionality on memory component

Integrated semiconductor memory with redundant memory cells

Method for testing an electric circuit

Method for testing an integrated semiconductor memory

Method for the defect analysis of memory modules

Method for testing the serviceability of bit lines in a DRAM memory...

Method and test circuit for testing a dynamic memory circuit

Method for determining the transit time of electrical signals on pr...

Patents Applicationslast 30 patents

Method and System for Testing an Integrated Circuit

METHOD AND SYSTEM FOR TESTING A MEMORY DEVICE

Test mode for IPP current measurement for wordline defect detection

Chip specific test mode execution on a memory module

Redundant wordline deactivation scheme

Test mode method and apparatus for internal memory timing signals

Serial presence detect functionality on memory component

Testmode and test method for increased stress duty cycles during bu...

Voltage monitoring test mode and test adapter

Method for testing an electric circuit

Test method for determining the wire configuration for circuit carr...

Method for testing an integrated semiconductor memory

Method for testing the serviceability of bit lines in a DRAM memory...

Integrated semiconductor memory with redundant memory cells

Monitoring device for monitoring internal signals during initializa...

Method and apparatus for checking output signals of an integrated c...

Method and test circuit for testing a dynamic memory circuit

Memory management configuration and method for making a main memory

Method for determining the transit time of electrical signals on pr...

Method for the defect analysis of memory modules