Marvin Tom

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Generating clock trees for a circuit design
- Patent number 10,068,048
- Issue date Sep 4, 2018
- Xilinx, Inc.
- Mehrdad Eslami Dehkordi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placement and routing of clock signals for a circuit design
- Patent number 10,042,971
- Issue date Aug 7, 2018
- Xilinx, Inc.
- Mehrdad Eslami Dehkordi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded scheduling for placement of circuit designs using con...
- Patent number 9,529,957
- Issue date Dec 27, 2016
- Xilinx, Inc.
- Grigor S. Gasparyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock region partitioning and clock routing
- Patent number 9,330,220
- Issue date May 3, 2016
- Xilinx, Inc.
- Mehrdad E. Dehkordi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routability based placement for multi-die integrated circuits
- Patent number 8,418,115
- Issue date Apr 9, 2013
- Xilinx, Inc.
- Marvin Tom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of and system for placing clock circuits in an integrated ci...
- Patent number 8,225,262
- Issue date Jul 17, 2012
- Xilinx, Inc.
- Marvin Tom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock domain partitioning of programmable integrated circuits
- Patent number 8,091,060
- Issue date Jan 3, 2012
- Xilinx, Inc.
- Marvin Tom
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Generating clock trees for a circuit design

Placement and routing of clock signals for a circuit design

Multithreaded scheduling for placement of circuit designs using con...

Clock region partitioning and clock routing

Routability based placement for multi-die integrated circuits

Method of and system for placing clock circuits in an integrated ci...

Clock domain partitioning of programmable integrated circuits